Datasheet

( )
2
OUT
RMP[2-0]
ΔV
mV 1
= 32
Δt μs
2
TPS62360, TPS62361B
TPS62362, TPS62363
www.ti.com SLVSAU9C –MAY 2011–REVISED NOVEMBER 2012
Register 0x06h Description: RmpCtrl
Table 31. TPS6236x Register 0x06h Description
REGISTER ADDRESS: 0x06h Read/Write
BIT NAME DEFAULT DESCRIPTION
MSB Output voltage ramp timing
D7 0 D7-D5 Slope
000 32 mV / µs
001 16 mV / µs
010 8 mV / µs
D6 0 . . . . . .
RMP[2:0]
110 0.5 mV / µs
111 0.25 mV / µs
D5 0
D4 x Reserved for future use
D3 x Reserved for future use
EN_DISC Active output capacitor discharge at shutdown
D2 0 0 = disabled
1 = enabled
Defines the ramp behavior if the device is in Power Save (PFM) mode
D1 RAMP_PFM 0 0 = output cap will be discharged by the load
1 = output voltage will be forced to follow the ramp down slope
D0 LSB x Reserved for future use
Register 0x07h Description: (Reserved)
Table 32. TPS6236x Register 0x07h Description
REGISTER ADDRESS: 0x07h
BIT NAME DEFAULT DESCRIPTION
D7 MSB x Reserved for future use
D6 x Reserved for future use
D5 x Reserved for future use
D4 x Reserved for future use
D3 x Reserved for future use
D2 x Reserved for future use
D1 x Reserved for future use
D0 LSB x Reserved for future use
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Product Folder Links: TPS62360 TPS62361B TPS62362 TPS62363