Datasheet

TPS62360, TPS62361B
TPS62362, TPS62363
SLVSAU9C –MAY 2011–REVISED NOVEMBER 2012 www.ti.com
Register 0x03h Description: SET3
The register settings apply by choosing SET3 ( VSEL1 = HIGH, VSEL0 = HIGH).
Table 25. TPS62360 Register 0x03h Description
REGISTER ADDRESS: 0x03h Read/Write
BIT NAME DEFAULT DESCRIPTION
MSB Operation mode for SET3
D7 MODE3 0 0 = PFM / PWM mode operation
1 = Forced PWM mode operation
D6 x Reserved for future use
Output voltage for SET3
D5 1
Default: (100001)
2
= 1.1V
D4 0 D5-D0 Output voltage
D3 0 00 0000 770 mV
00 0001 780 mV
OV3[5:0]
D2 0
00 0010 790 mV
. . . . . .
D1 0
11 1111 1400 mV
D0 LSB 1 V
OUT
= (xx xxxx)
2
× 10mV + 770 mV
Table 26. TPS62361B Register 0x03h Description
REGISTER ADDRESS: 0x03h Read/Write
BIT NAME DEFAULT DESCRIPTION
MSB Operation mode for SET3
D7 MODE3 0 0 = PFM / PWM mode operation
1 = Forced PWM mode operation
D6 1 Output voltage for SET3
Default: (1000010)
2
= 1.16V
D5 0
D4 0 D6-D0 Output voltage
D3 0 000 0000 500 mV
000 0001 510 mV
OV3[6:0]
D2 0
000 0010 520 mV
. . . . . .
D1 1
111 1111 1770 mV
D0 LSB 0 V
OUT
= (xxx xxxx)
2
× 10mV + 500 mV
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