Datasheet
TPS62360, TPS62361B
TPS62362, TPS62363
SLVSAU9C –MAY 2011–REVISED NOVEMBER 2012
www.ti.com
REGISTER SETTINGS
Overview
Table 9. TPS62360 Register Settings Overview
REGISTER (default / reset values)
RESET /
READ /
ADDRESS REGISTER DEFAULT MSB LSB
WRITE
STATE
D7 D6 D5 D4 D3 D2 D1 D0
0x00h SET0 0x111111 R/W MODE0 OV0[5:0]
0x01h SET1 0x010111 R/W MODE1 OV1[5:0]
0x02h SET2 0x111111 R/W MODE2 OV2[5:0]
0x03h SET3 0x100001 R/W MODE3 OV3[5:0]
0x04h Ctrl 111xxxxx R/W PD_EN PD_VSEL0 PD_VSEL1
0x05h Temp xxxxx000 R/W DIS_TS TJEW TJTS
0x06h RmpCtrl 000xx00x R/W RMP[2:0] EN_DISC RAMP_PFM
0x07h (Reserved) xxxxxxxx
0x08h Chip_ID
100000xx R
0x09h Chip_ID
Table 10. TPS62361B Register Settings Overview
REGISTER (default / reset values)
RESET /
READ /
ADDRESS REGISTER DEFAULT MSB LSB
WRITE
STATE
D7 D6 D5 D4 D3 D2 D1 D0
0x00h SET0 00101110 R/W MODE0 OV0[6:0]
0x01h SET1 01011010 R/W MODE1 OV1[6:0]
0x02h SET2 01000010 R/W MODE2 OV2[6:0]
0x03h SET3 01000010 R/W MODE3 OV3[6:0]
0x04h Ctrl 111xxxxx R/W PD_EN PD_VSEL0 PD_VSEL1
0x05h Temp xxxxx000 R/W DIS_TS TJEW TJTS
0x06h RmpCtrl 000xx00x R/W RMP[2:0] EN_DISC RAMP_PFM
0x07h (Reserved) xxxxxxxx
0x08h Chip_ID
100001xx R
0x09h Chip_ID
Table 11. TPS62362 Register Settings Overview
REGISTER (default / reset values)
RESET /
READ /
ADDRESS REGISTER DEFAULT MSB LSB
WRITE
STATE
D7 D6 D5 D4 D3 D2 D1 D0
0x00h SET0 0x101110 R/W MODE0 OV0[5:0]
0x01h SET1 0x010111 R/W MODE1 OV1[5:0]
0x02h SET2 0x101011 R/W MODE2 OV2[5:0]
0x03h SET3 0x100001 R/W MODE3 OV3[5:0]
0x04h Ctrl 111xxxxx R/W PD_EN PD_VSEL0 PD_VSEL1
0x05h Temp xxxxx000 R/W DIS_TS TJEW TJTS
0x06h RmpCtrl 000xx00x R/W RMP[2:0] EN_DISC RAMP_PFM
0x07h (Reserved) xxxxxxxx
0x08h Chip_ID
100010xx R
0x09h Chip_ID
36 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links: TPS62360 TPS62361B TPS62362 TPS62363