Datasheet

VIN
SW
PGND
VOUT
star ground point
TPS62360, TPS62361B
TPS62362, TPS62363
www.ti.com
SLVSAU9C MAY 2011REVISED NOVEMBER 2012
External Components Placement
The input capacitor at VIN must be placed closest to the IC for proper operation. The decoupling caps at AVIN
and VDD reduce noise impacts and should be placed as close to the IC as possible. The output filter, consisting
of C
OUT
and L, converts the switching signal at SW to the noiseless output voltage. It should be placed as close
as possible to the device keeping the switch node small, for best EMI behavior.
Trace routing
Route the VIN trace wide and thick to avoid IR drops. The trace between the input capacitor's higher node and
VIN as well as the trace between the input capacitor's lower node and PGND must be kept as short as possible.
Parasitic inductance on these traces must be kept as tiny as possible for proper device operation.
AVIN and AGND should be isolated from noisy signals. Route the AGND to the star ground point where no IR
drop occurs. The input cap at AVIN isolates noise. Proceed with VDD and AGND in a similar manner.
The trace between the switch node, SW, must connect directly to the inductor followed by the output capacitors,
C
OUT
. The switch node is an aggressor. Keeping this trace short reduces noise being radiated and improves EMI
behavior. The lower node of the output capacitor, C
OUT
, needs to connect to the star ground point. The
TPS6236x supports the point of load concept (POL). Input caps at the POL do not need to be placed closest to
the IC; they should be placed close to the POL. Route the traces between the TPS6236x's output capacitor and
the load's input capacitors direct and wide to avoid losses due to the IR drop.
Connect the sense lines to the POL. This puts into practice the remote sensing concept, allowing the device to
regulate the voltage at the POL, compensating IR drops. If possible, make a Kelvin connection to the load
device. The sense lines are susceptible to noise. They must be kept away from noisy signals such as PGND,
VIN, and SW, as well as high bandwidth signals such as the I
2
C bus. Avoid both capacitive as well as inductive
coupling by keeping the sense lines short, direct and close to each other. Run the lines in a quiet layer. Isolate
them from noisy signals by a voltage or ground plane if possible. Running the signal as a differential pair is
recommended.
The PGND nodes at C
IN
and C
OUT
can be connected underneath the IC at the PGND pins (star point). Make sure
that small signal traces returning to the AGND do not share the high current path at PGND to C
IN
and C
OUT
.
See Figure 52 for the recommended layout.
Figure 52. Layout Suggestion (top view) with 3225 Inductor. Overall Solution Size: 27.5mm
2
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