Datasheet

L
C + C
OUT LOAD
1µH
0.47µH
10µF 20µF
100µF 200µF
MAX( )C + C
OUT LOAD
MIN( )C
OUT
Output filter range
TPS6236x
PGND
PGND
PGND
SW
SW
LOAD
C
OUT
SENSE-
SENSE+
L
C
LOAD
TPS62360, TPS62361B
TPS62362, TPS62363
www.ti.com SLVSAU9C –MAY 2011–REVISED NOVEMBER 2012
Figure 50. L, C
OUT
and C
LOAD
Forming the Output Filter
Depending on the chosen inductor value, a certain minimum output capacitor C
OUT
must be present. Also
depending on the chosen inductor value, a maximum output and buffer capacitor configuration (C
OUT
+ C
LOAD
)
must not be exceeded. Figure 51 shows the range of L, C
OUT
and C
LOAD
that create a stable output filter.
Figure 51. Recommended L, C
OUT
and C
LOAD
Combinations
Within the allowed output filter range, a certain filter can be chosen to improve further on application specific key
parameters.
The choice of the inductance, L, affects the inductor current ripple, output voltage ripple, the PFM to PWM
transition point and the PFM operation switching frequency.
The TPS6236x is designed for operation with a nominal inductance value of 1µH. Inductances down to 0.47µH
nominal may be used to improve the load transient behavior or to decrease the total solution size. This increases
the inductor current ripple (see Equation 5). As a consequence, the output voltage ripple is increased if the
output capacitance is kept constant. The increased inductor ripple current also causes higher peak inductor
currents (see Equation 6), requiring a higher saturation current rating. Furthermore, the PFM switching frequency
is decreased and the automatic PFM to PWM transition occurs at a higher output current (see Equation 1).
The choice of the output and buffer capacitance (C
OUT
and C
LOAD
) affects the load step behavior, output voltage
ripple, PFM switching frequency and output voltage transition time.
A higher output capacitance improves the load step behavior and reduces the output voltage ripple as well as
decreasing the PFM switching frequency. For very large output filter combinations, the output voltage might be
slower than the programmed ramp rate at voltage transitions (see RAMP RATE CONTROLLING) because of the
higher energy stored on the output capacitance. At startup, the time required to charge the output capacitor to
0.5V might be longer. At shutdown, if the output capacitor is discharged by the internal discharge resistor (see
ENABLING AND DISABLING THE DEVICE), this requires more time to settle V
OUT
down as a consequence of
the increased time constant τ = R
DISCHARGE
x (C
OUT
+ C
LOAD
).
For further performance or specific demands, these values might be tweaked. In any case, the loop stability
should be checked since the control loop stability might be affected. At light loads, if the device is operating in
PFM Mode, choosing a higher value minimizes the voltage ripple resulting in a better DC output accuracy.
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