Datasheet

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TPS62300, TPS62301, TPS62302
TPS62303, TPS62304, TPS62305,
TPS62311, TPS62313, TPS62315, TPS62320, TPS62321
SLVS528E – JULY 2004 – REVISED NOVEMBER 2007
ELECTRICAL CHARACTERISTICS (continued)
V
I
= 3.6 V, V
O
= 1.6 V, EN = V
I
, MODE/SYNC = GND, L = 1 µ H, C
O
= 10 µ F, T
A
= -40 ° C to 85 ° C, typical values are at
T
A
= 25 ° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OSCILLATOR
f
SW
Oscillator frequency 2.65 3 3.35 MHz
f
(SYNC)
Synchronization range 2.65 3.35 MHz
Duty cycle of external clock signal 20% 80%
OUTPUT
Adjustable output TPS62300
V
O
0.6 5.4 V
voltage range TPS62320
Regulated feedback TPS62300
V
(FB)
0.4 V
voltage TPS62320
DC power train amplification
A
(PT)
1.496 1.5 1.504
(V
O
/V
(ADJ)
)
Minimum on-time (P-channel
t
on(MIN)
35 ns
MOSFET)
Resistance into VOUT sense pin 700 1000 k Ω
Resistance into ADJ pin V
(FB)
> 0.4 V 700 1000 1300 k Ω
Feedback input bias TPS62300
I
(FB)
V
(FB)
= 0.4 V 1 nA
current TPS62320
Adjustable output TPS62300
– 2% +2%
voltage
(1)
TPS62320
TPS6230x
TPS62311
– 2% +2%
2.7 V ≤ V
I
≤ 6 V, 0 mA ≤ I
O(DC)
≤ 500 mA
TPS62313
PFM/PWM mode operation
TPS6232x
Fixed output voltage
TPS62304 -2% +2.5%
TPS62305
– 2% +2.7%
TPS62315
T
A
= 25 ° C – 0.5% +1.3%
Adjustable output TPS62300
V
O
voltage dc accuracy
(1)
TPS62320
– 40 ° C ≤ T
A
≤ 85 ° C – 0.5% +1.3%
TPS6230x T
A
= 25 ° C – 0.5% +1.3%
TPS62311
TPS62313
– 40 ° C ≤ T
A
≤ 85 ° C – 0.5% +1.3%
PWM mode operation,
TPS6232x
V
I
= 3.6 V, No Load
Fixed output voltage
T
A
= 25 ° C -0.5% +1.8%
dc accuracy
TPS62304
– 40 ° C ≤ T
A
≤ 85 ° C -0.5% +1.8%
T
A
= 25 ° C – 0.3% +1.7%
TPS62305
TPS62315
– 40 ° C ≤ T
A
≤ 85 ° C – 0.5% +2%
DC output voltage load regulation I
O
= 0 mA to 500 mA, MODE/SYNC = V
I
– 0.001 – 0.002 %/mA
DC output voltage load regulation V
(ADJ)
externally forced to 1.067 V,
– 0.0003 – 0.0006 %/mA
(power train in direct drive mode) I
O
= 0 mA to 500 mA, MODE/SYNC = V
I
V
I
= V
O
+ 0.5 V (min 2.7 V) to
DC output voltage line regulation 0.11 0.2 %/V
6 V, I
O
= 100 mA, MODE/SYNC = V
I
V
(ADJ)
externally forced to 1.067 V,
DC output voltage line regulation
V
I
= V
O
+ 0.5 V (min 2.7 V) to 6 V 0.035 0.1 %/V
(power train in direct drive mode)
I
O
= 100 mA, MODE/SYNC = V
I
Integrator slew rate 100 150 200 µ V/ µ s
Δ V
O
Power-save mode ripple voltage I
O
= 1 mA, MODE/SYNC = GND 0.025 V
O
V
P-P
Start-up time I
O
= 200 mA, Time from active EN to V
O
250 µ s
Leakage current into SW pin V
I
> V
O
, 0 V ≤ V
(SW)
≤ VIN, EN = GND 0.1 1
I
lkg
µ A
Reverse leakage current into SW pin V
I
= open, V
(SW)
= 6 V, EN = GND 0.1 1
(1) Output voltage specification for the adjustable version does not include tolerance of external voltage programming resistors.
Copyright © 2004 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS62300, TPS62301, TPS62302 TPS62303, TPS62304, TPS62305, TPS62311, TPS62313,
TPS62315, TPS62320, TPS62321