Datasheet

www.ti.com
PIN ASSIGNMENTS
DRV PACKAGE
(TOPVIEW)
MODE
FB
GNDSW
EN
VIN
1
2
3
6
5
4
r
P
owe
P
AD
FUNCTIONAL BLOCK DIAGRAM
Zero-Pole
AMP.
Integrator
Error Amp
PFMComp .
+1% Voltagepositioning
PWM
Comp .
VREF
Control
Stage
GateDriver
Anti
Shoot-Through
Current
LimitComparator
Current
LimitComparator
VREF+1%
FB
FB
VIN
GND
MODE
SW1
EN
VIN
Softstart
VOUT RAMP
CONTROL
Thermal
Shutdown
Reference
0.6VVREF
Undervoltage
Lockout1.8V
Limit
HighSide
Limit
LowSide
Sawtooth
Generator
Int. Resistor
Network
FB
RI3
RI1
RI..N
Mode
GND
2.25MHz
Oscillator
TPS62290 , TPS62291 , TPS62293
SLVS764C – JUNE 2007 – REVISED MARCH 2008
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
V
IN
5 PWR VIN power supply pin.
GND 6 PWR GND supply pin
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling
EN 4 I
this pin to high enables the device. This pin must be terminated.
This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor
SW 1 OUT
between this terminal and the output capacitor.
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of
FB 3 I
fixed output voltage option, connect this pin directly to the output capacitor
MODE pin = high forces the device to operate in fixed-frequency PWM mode. Mode pin = low enables
MODE 2 I
the Power Save Mode with automatic transition from PFM mode to fixed-frequency PWM mode.
4 Submit Documentation Feedback Copyright © 2007 – 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS62290 TPS62291 TPS62293