Datasheet
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Input Capacitor Selection
LAYOUT CONSIDERATIONS
TPS62240 , TPS62242 , TPS62243
SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best
input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. For
most applications, a 4.7- µ F to 10- µ F ceramic capacitor is recommended. Because ceramic capacitors lose up to
80% of their initial capacitance at 5V, it is recommended that a 10- µ F input capacitor be used for input voltages
greater than 4.5V. The input capacitor can be increased without any limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input, and
the power is being supplied through long wires, such as from a wall adapter, a load step at the output, or VIN
step on the input, can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as
loop instability, or could even damage the part by exceeding the maximum ratings
Table 2. List of Capacitors
CAPACITANCE TYPE SIZE SUPPLIER
4.7 µ F GRM188R60J475K 0603: 1.6x0.8x0.8mm
3
Murata
10 µ F GRM188R60J106M69D 0603: 1.6x0.8x0.8mm
3
Murata
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, and additional stability
issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use
wide and short traces for the main current paths. The input capacitor should be placed as close as possible to
the IC pins as well as the inductor and output capacitor.
Connect the GND pin of the device to the PowerPAD™ land of the PCB and use this pad as a star point. Use a
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common
path to the GND pin, which returns the small signal components, and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed
away from noisy components and traces (for example, the SW line).
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Product Folder Link(s): TPS62240 TPS62242 TPS62243