Datasheet

( )
L)on(DSOUT(min)OUT(min)IN
RRIVV ++=
ú
û
ù
ê
ë
é
-
×
=
L
VV
V
V
t
I
f
OUTIN
OUT
IN
ON
OUT
PSM
2
2
TPS62175, TPS62177
SLVSB35B –OCTOBER 2012–REVISED JANUARY 2014 www.ti.com
(3)
Sleep Mode Operation
In Sleep Mode operation, the typical quiescent current is reduced from 22µA to 4.8 µA to significantly increase the
efficiency at load currents of typically less than 1mA (see Figure 1). It is designed to be enabled and disabled
during operation by pulling the SLEEP pin High or Low by the host (processor). Ultra low power micro controllers
in deep sleep or hibernating mode may set their output pins floating. Therefore, the TPS62175/7 have a pull-
down resistor internally connected to the SLEEP pin, to keep a logic Low level, when the Sleep input signal goes
High Impedance. But, if the Sleep signal goes directly from logic High to High Impedance, the low level detection
must be ensured considering the leakage of the micro controller's Sleep signal. An external pull-down resistor, on
the SLEEP pin, may be required. Connect the SLEEP pin to VOUT, not VIN, to disable Sleep Mode, because the
pin's voltage rating is limited to 7V max.
The output voltage is regulated with a fixed switching scheme, using a fixed on-time of about twice the minimum
on-time of Equation 1 (compare Figure 49 and Figure 50) and the minimum off-time. A new pulse is initiated
once the output voltage falls below its regulation threshold. Sleep Mode is limited with its dynamic response and
current capabilities. However, the device can deliver temporarily more than 15mA while still in Sleep Mode, to
allow micro controllers to wake up and drive the Sleep signal High, exiting Sleep Mode.
Continuously operating with a too high current in Sleep Mode causes the output voltage to drop until the PG pin
goes Low. As a safety feature, the device then returns to normal operation automatically, avoiding a complete
collapse of Vout. Once the load current decreases again, the device re-enters Sleep Mode operation. Certainly,
this is not a recommended operation mode and Sleep Mode should be entered/exited by using the SLEEP pin
logic.
Sleep Mode is not entered until Softstart is complete.
100% Mode Operation
The duty cycle of the buck converter is given by D=Vout/Vin and increases as the input voltage comes close to
the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch
100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal
setpoint. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of
battery-powered applications.
The minimum input voltage to maintain output voltage regulation can be calculated as:
spacing
(4)
spacing
where
I
OUT
is the output current,
R
DS(on)
is the R
DS(on)
of the high-side FET and
R
L
is the DC resistance of the inductor used.
spacing
Enable/Shutdown (EN)
The device can be switched on/off by pulling the EN pin to High (operation) or Low (shutdown). If EN is pulled to
High, the device starts operation after a delay of about 1ms (typ.). This helps to ensure a monotonic startup
sequence, which makes the device ideally suited to control the power on sequence of micro controllers.
During Shutdown, the internal MOSFETs as well as the entire control circuitry are turned off and the current
consumption is typically 1.5µA. The EN pin is connected via a 400kΩ pull-down resistor, keeping the logic level
low, if the pin is floating.
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