Datasheet

TPS62170, TPS62171
TPS62172, TPS62173
www.ti.com SLVSAT8C –NOVEMBER 2011–REVISED SEPTEMBER 2013
ELECTRICAL CHARACTERISTICS
over free-air temperature range (T
A
=-40°C to +85°C), typical values at V
IN
=12V and T
A
=25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
V
IN
Input Voltage Range
(1)
3 17 V
I
Q
Operating Quiescent Current EN=High, IOUT=0mA, device not switching 17 25 µA
I
SD
Shutdown Current
(2)
EN=Low 1.5 4 µA
Falling Input Voltage 2.6 2.7 2.82 V
V
UVLO
Undervoltage Lockout Threshold
Hysteresis 180 mV
T
SD
Thermal Shutdown Temperature 160
°C
Thermal Shutdown Hysteresis 20
CONTROL (EN, PG)
V
EN_H
High Level Input Threshold Voltage (EN) 0.9 V
V
EN_L
Low Level Input Threshold Voltage (EN) 0.3 V
I
LKG_EN
Input Leakage Current (EN) EN=V
IN
or GND 0.01 1 µA
Rising (%V
OUT
) 92 95 98
V
TH_PG
Power Good Threshold Voltage %
Falling (%V
OUT
) 87 90 93
V
OL_PG
Power Good Output Low I
PG
=-2mA 0.07 0.3 V
I
LKG_PG
Input Leakage Current (PG) V
PG
=1.8V 1 400 nA
POWER SWITCH
V
IN
≥6V 300 600
High-Side MOSFET ON-Resistance mΩ
V
IN
=3V 430
R
DS(ON)
V
IN
≥6V 120 200
Low-Side MOSFET ON-Resistance mΩ
V
IN
=3V 165
I
LIMF
High-Side MOSFET Forward Current Limit
(3)
V
IN
=12V, T
A
=25°C 0.85 1.05 1.35 A
OUTPUT
VREF Internal Reference Voltage
(4)
0.8 V
I
LKG_FB
Pin Leakage Current (FB) TPS62170, V
FB
=1.2V 5 400 nA
Output Voltage Range (TPS62170) V
IN
≥ V
OUT
0.9 6.0 V
PWM mode operation, V
IN
≥V
OUT
+1V –3 3
Initial Output Voltage Accuracy
(5)
%
Power Save Mode operation, C
OUT
=22µF -3.5 4
V
OUT
DC Output Voltage Load Regulation
(6)
V
IN
=12V, V
OUT
=3.3V, PWM mode operation 0.05 % / A
DC Output Voltage Line Regulation
(6)
3V ≤ V
IN
≤ 17V, V
OUT
=3.3V, I
OUT
= 0.5A, PWM
0.02 % / V
mode operation
(1) The device is still functional down to Under Voltage Lockout (see parameter V
UVLO
).
(2) Current into VIN pin.
(3) This is the static current limit. It can be temporarily higher in applications due to internal propagation delay (see Current Limit And Short
Circuit Protection).
(4) This is the voltage regulated at the FB pin.
(5) This is the accuracy provided by the device itself (line and load regulation effects are not included). For fixed voltage versions, the
(internal) resistive feedback divider is included.
(6) Line and load regulation are depending on external component selection and layout (see Figure 13 and Figure 14).
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