Datasheet

( )
L)on(DSOUT(min)OUT(min)IN
RRIVV ++=
TPS62130, TPS62130A
TPS62131, TPS62132, TPS62133
SLVSAG7B NOVEMBER 2011REVISED JUNE 2013
www.ti.com
100% Duty-Cycle Operation
The duty cycle of the buck converter is given by D=Vout/Vin and increases as the input voltage comes close to
the output voltage. In this case, the device starts 100% duty cycle operation turning on the high-side switch
100% of the time. The high-side switch stays turned on as long as the output voltage is below the internal set
point. This allows the conversion of small input to output voltage differences, e.g. for longest operation time of
battery-powered applications. In 100% duty cycle mode, the low-side FET is switched off.
The minimum input voltage to maintain output voltage regulation, depending on the load current and the output
voltage level, can be calculated as:
spacing
(3)
where
I
OUT
is the output current,
R
DS(on)
is the R
DS(on)
of the high-side FET and
R
L
is the DC resistance of the inductor used.
Enable / Shutdown (EN)
When Enable (EN) is set High, the device starts operation. Shutdown is forced if EN is pulled Low with a
shutdown current of typically 1.5µA. During shutdown, the internal power MOSFETs as well as the entire control
circuitry are turned off. The internal resistive divider pulls down the output voltage smoothly. The EN signal must
be set externally to High or Low. An internal pull-down resistor of about 400kΩ is connected and keeps EN logic
low, if Low is set initially and then the pin gets floating. It is disconnected if the pin is set High.
Connecting the EN pin to an appropriate output signal of another power rail provides sequencing of multiple
power rails.
Soft Start / Tracking (SS/TR)
The internal soft start circuitry controls the output voltage slope during startup. This avoids excessive inrush
current and ensures a controlled output voltage rise time. It also prevents unwanted voltage drops from high-
impedance power sources or batteries. When EN is set to start device operation, the device starts switching after
a delay of about 50µs and VOUT rises with a slope controlled by an external capacitor connected to the SS/TR
pin. See Figure 33 and Figure 34 for typical startup operation.
Connecting SS/TR directly to AVIN provides fastest startup behavior. The TPS6213X can start into a pre-biased
output. During monotonic pre-biased startup, both the power MOSFETs are not allowed to turn on until the
device's internal ramp sets an output voltage above the pre-bias voltage. As long as the output is below about
0.5V a reduced current limit of typically 1.6A is set internally. If the device is set to shutdown (EN=GND),
undervoltage lockout or thermal shutdown, an internal resistor pulls the SS/TR pin down to ensure a proper low
level. Returning from those states causes a new startup sequence as set by the SS/TR connection.
A voltage supplied to SS/TR can be used for tracking a master voltage. The output voltage will follow this voltage
in both directions up and down (see APPLICATION INFORMATION).
Current Limit And Short Circuit Protection
The TPS6213X devices are protected against heavy load and short circuit events. If a short circuit is detected
(VOUT drops below 0.5V), the current limit is reduced to 1.6A typically. If the output voltage rises above 0.5V,
the device will run in normal operation again. At heavy loads, the current limit determines the maximum output
current. If the current limit is reached, the high-side FET will be turned off. Avoiding shoot through current, the
low-side FET will be switched on to sink the inductor current. The high-side FET will turn on again, only if the
current in the low-side FET has decreased below the low side current limit threshold.
The output current of the device is limited by the current limit (see ELECTRICAL CHARACTERISTICS). Due to
internal propagation delay, the actual current can exceed the static current limit during that time. The dynamic
current limit can be calculated as follows:
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Product Folder Links: TPS62130, TPS62130A TPS62131 TPS62132 TPS62133