Datasheet

TPS62120
TPS62122
SLVSAD5 –JULY 2010 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
V
IN
= 8V, V
OUT
= 1.8V, EN = V
IN
, T
J
= –40°C to 85°C, typical values are at T
J
= 25°C (unless otherwise noted), C
IN
= 4.7µF,
L = 22µH, C
OUT
= 4.7µF, see Parameter Measurement Information
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
REGULATOR
t
ONmin
Minimum ON time V
IN
= 3.6 V, V
OUT
= 1.8 V 700 ns
t
OFFmin
Minimum OFF time V
IN
= 3.6 V, V
OUT
= 1.8 V 60 ns
V
REF
Internal reference voltage 0.8 V
Feedback FB voltage comparator
Referred to 0.8V internal reference –2.5% 0% 2.5%
threshold
V
FB
Feedback FB voltage line regulation I
OUT
= 50 mA,
(3)
0.04 %/V
I
IN
Input bias current FB V
FB
= 0.8 V 0 50 nA
Time from active EN to device starts switching, VIN
t
Start
Regulator start-up time 50 150
= 2.6V
µs
t
Ramp
Output voltage ramp time Time to ramp up V
OUT
= 1.8V, no load
(4)
120 300
V
OUT
= V
IN
= V
SW
= 1.8 V, EN = GND, device in
I
LK_SW
Leakage current into SW pin 1 1.5 µA
shutdown mode
POWER GOOD OUTPUT (TPS62120)
Rising V
FB
feedback voltage 93% 95% 97%
V
THPG
Power Good threshold voltage
Falling V
FB
feedback voltage 87% 90% 93%
Current into PG pin I = 500 µA, V
OUT
> 1.5 V 165
V
OL
Output low voltage mV
Current into PG pin I = 100 µA, 1.2 V < V
OUT
<1.5 V 50
V
H
Output high voltage Open drain output, external pull up resistor 5.5 V
Leakage current into PG pin V
(PG)
= 1.8V, EN = high, FB = 0.85 V 0 50 nA
I
LKG
Leakage into VOUT pin V
(OUT)
= 1.8 V 0 50 nA
Internal power good comparator delay
T
PGDL
V
OUT
= 1.8 V 2 5 µs
time
SGND OPEN DRAIN OUTPUT (TPS62120)
R
DSON
NMOS drain source resistance SGND = 1.8 V, V
IN
= 2 V 370 Ω
I
LKG
Leakage current into SGND pin EN = VIN, SGND = 1.8 V 0 50 nA
(3) V
OUT
+1V ≤ V
IN
; V
OUT
≤ 5.5V
(4) Maximum value not production tested
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