Datasheet

TPS62120
TPS62122
www.ti.com SLVSAD5 –JULY 2010
INPUT CAPACITOR SELECTION
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing the interference with other circuits caused by high input
voltage spikes. For most applications a 4.7µF to 10µF ceramic capacitor is recommended. The voltage rating
and DC bias characteristic of ceramic capacitors need to be considered. The input capacitor can be increased
without any limit for better input voltage filtering.
For specific applications like energy harvesting a tantalum or tantalum polymer capacitor can be used to achieve
a specific DC/DC converter input capacitance. Tantalum capacitors provide much better DC bias performance
compared to ceramic capacitors. In this case a 1µF or 2.2µF ceramic capacitor should be used in parallel to
provide low ESR.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output or V
IN
step on
the input can induce large ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop
instability or could even damage the part by exceeding the maximum ratings.
Table 3 shows a list of input/output capacitors.
Table 3. List of Capacitor
CAPACITANCE SIZE CAPACITOR TYPE USAGE SUPPLIER
[µF]
4.7 0603 GRM188 series 6.3V X5R C
OUT
Murata
2.2 0603 GRM188 series 6.3V X5R C
OUT
Murata
4.7 0805 GRM21Bseries 25V X5R C
IN
Murata
10 0805 GRM21Bseries 16V X5R C
IN
Murata
8.2 B2(3.5 × 2.8 × 1.9) 20TQC8R2M (20V) C
IN
Sanyo
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
• Switching node, SW
• Inductor current, I
L
• Output ripple voltage, V
O(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. During application of
the load transient and the turn on of the high-side MOSFET switch, the output capacitor must supply all of the
current required by the load. V
OUT
immediately shifts by an amount equal to ΔI
(LOAD)
× ESR, where ESR is the
effective series resistance of C
OUT
. ΔI
(LOAD)
begins to charge or discharge C
OUT
generating a feedback error
signal used by the regulator to return V
OUT
to its steady-state value. The results are most easily interpreted when
the device operates in PWM mode.
During this recovery time, V
OUT
can be monitored for settling time, overshoot or ringing that helps judge the
converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin. Because the
damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET R
DS(on)
) which are
temperature dependent, the loop stability analysis should be done over the input voltage range, load current
range, and temperature range
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well
as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins
as well as the inductor and output capacitor.
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