Datasheet

Oscilloscope

Load

Power Supply

J5 J6

ON OFF PG GND

JP1

JP2

VIN

GND

TPS62120EVM-640

S+

S-

GNDVOUT

S+ S-

Test Configuration

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3.1.10 J8 PG/GND

J8 pin 1 is connected to the Power Good (PG) output of the TPS62120. This open drain output is pulled

up to VOUT with R3. PG output goes high when the FB voltage rises above 95% (typ) of its nominal

value. PG goes low when the FB voltage drops below 90% (typ) of its nominal value.

4 Test Configuration

4.1 Hardware Setup

Figure 2 illustrates a typical hardware test configuration.

Figure 2. Hardware Board Connection

TPS62120EVM SLVU411–September 2010

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