Datasheet
TPS62110-Q1
SLVSA54A –FEBRUARY 2010–REVISED SEPTEMBER 2012
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
PARAMETER VALUE
V
CC
Supply voltage at VIN, VINA –0.3 V to 20 V
Voltage at SW –0.3 V to V
I
V
I
Voltage at EN, SYNC, LBO, PG –0.3 V to 20 V
Voltage at LBI, FB –0.3 V to 7 V
I
O
Output current at SW 2400 mA
T
J
Maximum junction temperature 150°C
T
stg
Storage temperature –65°C to 150°C
ESD Human body model (HBM) AEC-Q100 Classification Level H2 2 kV
ratings
Charged device model (CDM) AEC-Q100 Classification Level C3B 750 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
(1)
T
A
≤ 25°C DERATING FACTOR T
A
= 70°C T
A
= 85°C
PACKAGE
POWER RATING ABOVE T
A
= 25°C POWER RATING POWER RATING
RSA 2.5 W 25 mW/°C 1.375 W 1 W
(1) Based on a thermal resistance of 40 K/W soldered onto a high K board.
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
V
CC
Supply voltage at VIN, VINA 3.1 17 V
Maximum voltage at power-good, LBO, EN, SYNC 17 V
T
J
Operating junction temperature –40 125 °C
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