Datasheet

VIN
EN
SYNC
LBO
LBI
VINA
AGND
FB GND
GND
PG
SW
SW
PGND
VIN
PGND
PWP PACKAGE
(TOP VIEW)
Exposed
Thermal
Pad
TPS62110-HT
SLVSAO9B –DECEMBER 2010–REVISED FEBRUARY 2011 www.ti.com
DEVICE INFORMATION
PIN ASSIGNMENT TOP VIEW
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
Enable. A logic high enables the converter; logic low forces the device into shutdown mode reducing the
EN 2 I
supply current to less than 2 µA.
Feedback pin for the fixed output voltage option. For the adjustable version, an external resistive divider
FB 8 I
is connected to this pin. The internal voltage divider is disabled for the adjustable version.
LBO 4 O Open-drain, low-battery output. This pin is pulled low if LBI is below its threshold.
GND 9, 10 I Ground
LBI 5 I Low-battery input
Connect the inductor to this pin. This pin is the switch pin and connected to the drain of the internal
SW 12, 13 O
power MOSFETS.
Power good comparator output. This is an open-drain output. A pullup resistor should be connected
PG 11 O between PG and VOUT. The output goes active high when the output voltage is greater than 98.4% of
the nominal value.
PGND 14, 15 I Power ground. Connect all power grounds to this pin.
AGND 7 I Analog ground, connect to GND and PGND
Input for synchronization to external clock signal. Synchronizes the converter switching frequency to an
external clock signal with CMOS level:
SYNC 3 I
SYNC = HIGH: Low-noise mode enabled, fixed frequency PWM operation is forced
SYNC = LOW (GND): Power save mode enabled, PFM/PWM mode enabled
VIN 1, 16 I Supply voltage input (power stage)
VINA 6 I Supply voltage input (support circuits)
PowerPAD™ Connect to AGND
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