Datasheet

TPS62090, TPS62091
TPS62092, TPS62093
SLVSAW2A –MARCH 2012–REVISED MARCH 2012 www.ti.com
Frequency Set Pin (FREQ)
The FREQ pin is a digital logic input which sets the nominal switching frequency. Pulling this pin to GND sets the
nominal switching frequency to 2.8 MHz and pulling this pin high sets the nominal switching frequency to 1.4
MHz. Since this pin changes the switching frequency it also changes the on-time during PFM mode. At 1.4 MHz
the on-time is twice the on-time as operating at 2.8 MHz. This pin has an active pull-down resistor of typically
400 kΩ. For applications where efficiency is of highest importance, a lower switching frequency should be
selected. A higher switching frequency allows the use of smaller external components, faster load transient
response and lower output voltage ripple when using same L-C values.
Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts
down the device at input voltages lower than typically 2.2 V with a 200 mV hysteresis.
Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically 150°C with a 20°C
hysteresis.
APPLICATION INFORMATION
DESIGN PROCEDURE
The first step is the selection of the output filter components. To simplify this process, Table 2 and Table 3
outline possible inductor and capacitor value combinations.
Table 2. Output Filter Selection (2.8 MHz Operation, FREQ = GND)
OUTPUT CAPACITOR VALUE [µF]
(2)
INDUCTOR VALUE [µH]
(1)
10 22 47 100 150
0.47 √
(3)
√ √ √
1.0 √ √ √ √ √
2.2
3.3
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by +20% and
-30%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
+20% and -50%.
(3) Typical application configuration. Other check mark indicates alternative filter combinations
Table 3. Output Filter Selection (1.4 MHz Operation, FREQ = V
IN
)
OUTPUT CAPACITOR VALUE [µF]
(2)
INDUCTOR VALUE [µH]
(1)
10 22 47 100 150
0.47 √ √ √ √
1.0 √ √
(3)
√ √ √
2.2 √ √ √ √ √
3.3
(1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by +20% and
–30%.
(2) Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
+20% and –50%.
(3) Typical application configuration. Other check mark indicates alternative filter combinations
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