Datasheet

2.8MHz
1.4MHz
2
V
OUT
ton = × 360ns
V
IN
V
OUT
ton = × 360ns × 2
V
IN
2 × I
OUT
=
V - V V - V
IN IN
OUT OUT
ton 1 + x
V L
OUT
f
æ ö
ç ÷
ç ÷
è ø
SS SS
1.25V
t = C x
7.5μA
SS
FB
V
V =
1.56
TPS62090, TPS62091
TPS62092, TPS62093
SLVSAW2A –MARCH 2012–REVISED MARCH 2012 www.ti.com
Power Save Mode Operation
As the load current decreases, the converter enters Power Save Mode operation. During Power Save Mode the
converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current while
maintaining high efficiency. The Power Save Mode is based on a fixed on-time architecture following Equation 1.
When operating at 1.4 MHz the on-time is twice as long as the on-time for 2.8 MHz operation. This results in
larger output voltage ripple, as shown in Figure 17 and Figure 18, and slightly higher output voltage at no load,
as shown in Figure 8 and Figure 9. To have the same output voltage ripple at 1.4 MHz during PFM mode, either
the output capacitor or the inductor value needs to be increased. As an example, operating at 2.8 MHz using
0.47 µH inductor gives the same output voltage ripple as operating with 1.4 MHz using 1 µH inductor.
(1)
In Power Save Mode the output voltage rises slightly above the nominal output voltage in PWM mode, as shown
in Figure 8 and Figure 9. This effect can be reduced by increasing the output capacitance or the inductor value.
This effect can also be reduced by programming the output voltage of the TPS62090 lower than the target value.
As an example, if the target output voltage is 3.3 V, then the TPS62090 can be programmed to 3.3V - 0.8%. As
a result the output voltage accuracy is now -2.2% to +2.2% instead of -1.4% to 3%. The output voltage accuracy
in PFM operation is reflected in the electrical specification table and given for a 22 µF output capacitance.
Low Dropout Operation (100% Duty Cycle)
The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode the high
side MOSFET switch is constantly turned on. This is particularly useful in battery powered applications to achieve
longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage
where the output voltage falls below its nominal regulation value is given by:
V
IN(min)
= V
OUT(max)
+ I
OUT
x ( R
DS(on)
+ R
L
) (2)
Where
R
DS(on)
= High side FET on-resistance
R
L
= DC resistance of the inductor
V
OUT(max)
= nominal output voltage plus maximum output voltage tolerance
Softstart (SS)
To minimize inrush current during start up, the device has an adjustable softstart depending on the capacitor
value connected to the SS pin. The device charges the softstart capacitor with a constant current of typically 7.5
µA. The feedback voltage follows this voltage with a fraction of 1.56 until the internal reference voltage of 0.8 V is
reached. The softstart operation is completed once the voltage at the softstart capacitor has reached typically
1.25 V. The soft-start time can be calculated using Equation 3. The larger the softstart capacitor the longer the
softstart time. The relation between softstart voltage and feedback voltage can be estimated using Equation 4.
(3)
(4)
This is also the case for the fixed output voltage option having the internal regulation voltage. Leaving the
softstart pin floating sets the minimum start-up time.
12 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): TPS62090 TPS62091 TPS62092 TPS62093