Datasheet

2.8MHz
1.4MHz
2
V
OUT
ton = × 360ns
V
IN
V
OUT
ton = × 360ns × 2
V
IN
2 × I
OUT
=
V - V V - V
IN IN
OUT OUT
ton 1 + x
V L
OUT
f
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TPS62090 , TPS62091 , TPS62092 , TPS62093
www.ti.com SLVSAW2B –MARCH 2012–REVISED APRIL 2014
9.3 Feature Description
9.3.1 Power Good Output (PG)
The power good output is low when the output voltage is below its nominal value. The power good will become
high impedance once the output is within 5% of regulation. The PG pin is an open drain output and is specified to
typically sink up to 1 mA. This output requires a pull-up resistor to be monitored properly. The pull-up resistor
cannot be connected to any voltage higher than the input voltage of the device.
9.3.2 Frequency Set Pin (FREQ)
The FREQ pin is a digital logic input which sets the nominal switching frequency. Pulling this pin to GND sets the
nominal switching frequency to 2.8 MHz and pulling this pin high sets the nominal switching frequency to 1.4
MHz. Since this pin changes the switching frequency it also changes the on-time during PFM mode. At 1.4 MHz
the on-time is twice the on-time as operating at 2.8 MHz. This pin has an active pull-down resistor of typically
400 kΩ. For applications where efficiency is of highest importance, a lower switching frequency should be
selected. A higher switching frequency allows the use of smaller external components, faster load transient
response and lower output voltage ripple when using same L-C values.
9.3.3 Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts
down the device at input voltages lower than typically 2.2 V with a 200 mV hysteresis.
9.3.4 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically 150°C with a 20°C
hysteresis.
9.4 Device Functional Modes
9.4.1 PWM Operation
At medium to heavy load currents, the device operates with pulse width modulation (PWM) at a nominal
switching frequency of 2.8 MHz or 1.4 MHz depending on the setting of the FREQ pin. As the load current
decreases, the converter enters the Power Save Mode operation reducing its switching frequency. The device
enters Power Save Mode at the boundary to discontinuous conduction mode (DCM).
9.4.2 Power Save Mode Operation
As the load current decreases, the converter enters Power Save Mode operation. During Power Save Mode the
converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current while
maintaining high efficiency. The Power Save Mode is based on a fixed on-time architecture following Equation 1.
When operating at 1.4 MHz the on-time is twice as long as the on-time for 2.8 MHz operation. This results in
larger output voltage ripple, as shown in Figure 19 and Figure 20, and slightly higher output voltage at no load,
as shown in Figure 16 and Figure 17. To have the same output voltage ripple at 1.4 MHz during PFM mode,
either the output capacitor or the inductor value needs to be increased. As an example, operating at 2.8 MHz
using 0.47 µH inductor gives the same output voltage ripple as operating with 1.4 MHz using 1 µH inductor.
(1)
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