Datasheet

EN
VIN
ON
OFF
0.3 µA, min
R >1.3 V/0.3 µA
TPS6205x
5 V
EN
VINVIN
V
t
= 0.7 V
0 µA for V
EN
< 0.6 V
Typically 0.3 µA to 5 µAfor V
EN
< 4 V
Enable to Internal Circuitry
TPS62052, TPS62054
TPS62056, TPS62050, TPS62051
SLVS432E SEPTEMBER 2002REVISED JUNE 2011
www.ti.com
Figure 18. Internal Circuit of the ENABLE Pin
The EN pin can be used in a pushbutton configuration as shown in Figure 19. The external resistor to GND must
be capable of sinking 0.3 µA with a minimum voltage drop of 1.3 V to keep the system enabled when both
switches are open. When the ON-button is pressed, the device is enabled and the current through the external
resistor keeps the voltage level high to ensure that the device stays on when the ON-button is released. When
the OFF-button is pressed, the device is switched off and the current through the external resistor is zero. The
device therefore stays off even when the OFF-button is released.
Figure 19. Pushbutton Configuration for the EN-Pin
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions.
Synchronization
If no clock signal is applied, the converter operates with a typical switching frequency of 850 kHz. It is possible to
synchronize the converter to an external clock within a frequency range from 600 kHz to 1200 kHz. The device
automatically detects the rising edge of the first clock and synchronizes to the external clock. If the clock signal is
stopped, the converter automatically switches back to the internal clock and continues operation. The switchover
is initiated if no rising edge on the SYNC pin is detected for a duration of four clock cycles. Therefore, the
maximum delay time can be 8.3 µs if the internal clock has its minimum frequency of 600 kHz. During this time,
there is no clock signal available. The device stops switching until the internal circuitry is switched to the internal
clock source.
When the device is switched between internal synchronization and external synchronization during operation, the
output voltage may show transient over/undershoot during switchover. The voltage transients are minimized by
using 850 kHz as an initial external frequency, and changing the frequency slowly (>1 ms) to the value desired.
The voltage drop at the output when the device is switched from external synchronization to internal
synchronization can be reduced by increasing the output capacitor value.
If the device is synchronized to an external clock, the power-save mode is disabled and the device stays in
forced PWM mode.
12 Submit Documentation Feedback Copyright © 2002–2011, Texas Instruments Incorporated
Product Folder Links: TPS62052 TPS62054 TPS62056 TPS62050 TPS62051