Datasheet

OUT(CL) V(CL) L
1
I = (1 D) (I + I )
2
- Dg
IN
OUT
V
D 1
V
h
= -
g
IN
L
V D
I
L f
D =
g
g
TPS61252
SLVSAG3 –SEPTEMBER 2010 www.ti.com
DETAILED DESCRIPTION
OPERATION
The TPS61252 Boost Converter operates as a quasi-constant frequency adaptive on-time controller. In a typical
application the frequency will be 3.25 MHz and is defined by the input to output voltage ratio and does not vary
from moderate to heavy load currents. At light load currents the converter will automatically enter Power Save
Mode and operates then in PFM (Pulse Frequency Modulation) mode. During pulse-width-modulation (PWM)
operation the converter uses a unique fast response quasi-constant on-time valley current mode controller
scheme which offers very good line and load regulation allowing the use of small ceramic input and output
capacitors.
Based on the V
IN
/V
OUT
ratio, a simple circuit predicts the required on-time. At the beginning of the switching
cycle, the low-side NMOS switch is turned-on and the inductor current ramps up to a peak current that is defined
by the on-time and the inductance. In the second phase, once the peak current is reached, the current
comparator trips, the on-timer is reset turning off the switch, and the current through the inductor then decays to
an internally set valley current limit. Once this occurs, the on-timer is set to turn the boost switch back on again
and the cycle is repeated.
The TPS61252 controls the input current through intelligent adjustment of a valley current limit that corrects the
value in a way that it almost turns out as an average input current limit. The current can be adjusted with an
accuracy of ±20%.
This architecture with adaptive slope compensation provides excellent transient load response and requires
minimal output filtering. Internal softstart and loop compensation simplifies the design process while minimizing
the number of external components.
CURRENT LIMIT OPERATION
The current limit circuit employs a valley current sensing scheme. Current limit detection occurs during the off
time through sensing of the voltage drop across the synchronous rectifier.
The output voltage is reduced as the power stage of the device operates in a constant current mode. The
maximum continuous output current (I
OUT(CL)
), before entering current limit (CL) operation, can be defined by
Equation 1.
(1)
The duty cycle (D) can be estimated by Equation 2
(2)
and the peak-to-peak current ripple (ΔI
L
) is calculated by Equation 3
(3)
The output current, I
OUT(DC)
, is the average of the rectifier current waveform. When the load current is increased
such that the lower peak is above the current limit threshold, the off-time is increased to allow the current to
decrease to this threshold before the next on-time begins. When the current limit is reached the output voltage
decreases if the load is further increased.
SOFTSTART
The TPS61252 has an internal softstart circuit that controls the ramp-up of the current during start-up and
prevents the converter from inrush current that exceeds the set current limit. For typical 100 µs the current is
ramped to the set current limit. After reaching the current limit threshold it stays there until V
IN
= V
OUT
then the
converter starts switching and boosting up the voltage to its nominal output voltage. During the complete start-up
the input current does not exceed the current limit that is set by resistor R
ILIM
.
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