Datasheet
TPS61251
SLVSAF7 –SEPTEMBER 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE DEVICE OPTIONS
T
A
OUTPUT VOLTAGE
(1)
PACKAGE MARKING PACKAGE PART NUMBER
(2)
–40°C to 85°C Adjustable QTH 8-Pin QFN TPS61251GSG
(1) Contact TI for other fixed output voltage options
(2) For detailed ordering information please check the PACKAGE OPTION ADDENDUM section at the end of this datasheet.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
Voltage range
(2)
VIN, VOUT, SW, EN, PG, FB, ILIM –0.3 7 V
Operating junction, T
J
–40 150 °C
Temperature range
Storage, T
stg
–65 150 °C
Human Body Model - (HBM) 2 kV
ESD rating
(3)
Charge Device Model - (CDM) 0.5 kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
(2) All voltages are with respect to network ground terminal.
(3) ESD testing is performed according to the respective JESD22 JEDEC standard.
THERMAL INFORMATION
TPS61251
THERMAL METRIC
(1)
DSG UNITS
8 PINS
q
JA
Junction-to-ambient thermal resistance 80.2
q
JCtop
Junction-to-case (top) thermal resistance 93.5
q
JB
Junction-to-board thermal resistance 54.2
°C/W
y
JT
Junction-to-top characterization parameter 0.9
y
JB
Junction-to-board characterization parameter 59.3
q
JCbot
Junction-to-case (bottom) thermal resistance 20
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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