Datasheet
IFB6
Fault
PGND
ISET
1
16
SW
2
VBAT
3
Vout
4
5
6 7 8
9
10
11
12
15 14 13
Cin
IFB1
IFB2
IFB 3
GND
DCTRL
IFB 4
TPS61181A
EN
IFB5
TPS61181A
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SLVSAN6A –FEBRUARY 2011– REVISED MARCH 2011
PINOUT
PIN ASSIGNMENTS
PIN I/O DESCRIPTION
NO. NAME
1 PGND I Power ground of the IC. Internally, it connects to the source of the PWM switch.
2 SW I This pin connects to the drain of the internal PWM switch, external Schottky diode and inductor.
3 V
BAT
I This pin is connected to the battery supply. It provides the pull-up voltage for the Fault pin and battery
voltage signal. This is also the input to the internal LDO.
4 V
O
O This pin monitors the output of the boost regulator. Connect this pin to the anode of the WLED strings.
5 ISET I The resistor on this pin programs the WLED output current.
6 Cin I Supply voltage of the IC. It is the output of the internal LDO. Connect 0.1 μF bypass capacitor to this pin.
7, 8, 9 IFB1-IFB3 I Current sink regulation inputs. They are connected to the cathode of WLEDs. The PWM loop regulates
12, 13, 14 IFB4-IFB6 the lowest V
IFB
to 400 mV. Each channel is limited to 30 mA current.
10 GND I Signal ground of the IC.
11 DCTRL I Dimming control logic input. The dimming frequency range is 100 Hz to 1 kHz.
15 EN I The enable pin to the IC. A logic high signal turns on the internal LDO and enables the IC. Therefore, do
not connect the EN pin to the Cin pin.
16 Fault I Gate driver output for an external PFET used for fault protection. It can also be used as signal output for
system fault report.
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