Datasheet

Minimize thearea
ofSWtrace
SW
AGND
EN
Thermal Pad
SW
VIN
SS
SYNC
PGND
COMP
NC
FREQ
FB
PGND
PGND
OUTPUT
CAPACITOR
PGND
VOUT
SCHOTTKEY
Place enough
VIAs around
thermalpadto
enhance thermal
performance
COMPESNATION
NETWORK
FEEDBACK
SW
AGND
INDUCTOR
VIN
INPUT
CAPACITOR
A
D
(max)
JA
125 C T
P =
R
q
° -
TPS61175
SLVS892B –DECEMBER 2008–REVISED FEBRUARY 2012 www.ti.com
Figure 18. TPS61175 Layout
THERMAL CONSIDERATIONS
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. This
restriction limits the power dissipation of the TPS61175. Calculate the maximum allowable dissipation, P
D
(max),
and keep the actual dissipation less than or equal to P
D
(max). The maximum-power-dissipation limit is
determined using the following equation:
(21)
where, T
A
is the maximum ambient temperature for the application. R
θJA
is the thermal resistance junction-to-
ambient given in Power Dissipation Table.
The TPS61175 comes in a thermally enhanced TSSOP package. This package includes a thermal pad that
improves the thermal capabilities of the package. The RθJA of the TSSOP package greatly depends on the PCB
layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using
thermal vias underneath the thermal pad.
18 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS61175