Datasheet

LowBit
(Logic0)
HighBit
(Logic1)
t
Low
t
High
t
LOW
t
High
EasyScaleTiming,withoutacknowledgeRFA =0
DA7
0
t
Start
StaticHigh
StaticHigh
DATA IN
t
Start
T
EOS
T
EOS
DA0
0
RFA
0
D0
1
AddressByte DATA Byte
EasyScaleTiming,withacknowledgeRFA =1
StaticHigh
t
ACKN
Acknowledge
true,DataLine
pulleddownby
device
DATA IN
DATA OUT
Acknowledge
false,nopull
down
Controllerneedsto
PullupDataLineviaa
resistortodetect ACKN
ACKN
DA7
0
StaticHigh
T
EOS
t
valACK
DA0
0
RFA
1
D0
1
t
Start
t
Start
AddressByte DATA Byte
TPS61170
www.ti.com SLVS789C – NOVEMBER 2007– REVISED APRIL 2011
Table 2. EasyScale™ Bit Description (continued)
BIT TRANSMISSION
BYTE NAME DESCRIPTION
NUMBER DIRECTION
7 (MSB) RFA Request for acknowledge. If high, acknowledge is applied by device
6 A1 0 Address bit 1
5 A0 0 Address bit 0
4 D4 Data bit 4
Data byte IN
3 D3 Data bit 3
2 D2 Data bit 2
1 D1 Data bit 1
0 (LSB) D0 Data bit 0
Acknowledge condition active 0, this condition will only be applied in case RFA bit is
set. Open drain output, Line needs to be pulled high by the host with a pullup
ACK OUT
resistor. This feature can only be used if the master has an open drain output stage.
In case of a push pull output stage Acknowledge condition may not be requested!
Figure 16. EasyScale™— Bit Coding
All bits are transmitted MSB first and LSB last. Figure 16 shows the protocol without acknowledge request (Bit
RFA = 0), Figure 16 with acknowledge (Bit RFA = 1) request. Prior to both bytes, device address byte and data
byte, a start condition must be applied. For this, the CTRL pin must be pulled high for at least t
start
(2μs) before
the bit transmission starts with the falling edge. If the CTRL pin is already at high level, no start condition is
needed prior to the device address byte. The transmission of each byte is closed with an End of Stream
condition for at least t
EOS
(2μs).
Copyright © 2007–2011, Texas Instruments Incorporated 13