Datasheet

FB
VO
SW
OUT
SS
CP1
GND
VIN
EN
T
h
e
r
m
a
l
P
a
d
CP2
Vout
C1
R1
R2
C3
C2
L1
Vin
R3
GND
C4
C5
Placeenough
VIAsaround
thermalpadto
enhacethermal
performance
Minimizethe
areaofSW
trace
R1
294kW
V 15V/50mA
o
TPS61093
CP1
CP2
SW
FBEN
OUT
VO
VIN
GNDSS
C1
4.7 Fm
R2
10.2kW
L1
10 Hm
V 1.8Vto6V
in
R3
200kW
C5
1 Fm
C3 100nF C2 0.1 Fm
C4
100 Fm
C6
10nF
TPS61093
SLVS992A SEPTEMBER 2009REVISED NOVEMBER 2009
www.ti.com
LAYOUT CONSIDERATIONS
As for all switching power supplies, especially those running at high switching frequency and high currents,
layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well
as noise problems. To maximize efficiency, switch rise and fall times are very fast. To prevent radiation of high
frequency noise (e.g., EMI), proper layout of the high frequency switching path is essential. Minimize the length
and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to
minimize interplane coupling. The high current path including the switch and output capacitor contains
nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not only to be
close to the VIN pin, but also to the GND pin in order to reduce input supply ripple.
ADDITIONAL APPLICATION
15-V Boost Converter with 100-μF Output Capacitor
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Product Folder Link(s): TPS61093