Datasheet

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ELECTRICAL CHARACTERISTICS
TPS61050
TPS61052
SLUS525 – MARCH 2007
Unless otherwise noted the specification applies for V
IN
= 3.6 V over an operating junction temp. of –40 ° C ≤ T
J
≤ 125 ° C.
Typical values are for T
A
= 25 ° C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
Input voltage range 2.5 6.0 V
V
IN
Minimum input voltage for start-up MODE_CTRL[1:0] = 11, OV[1:0] = 01, R
L
= 10 Ω 2.5 V
I
Q
Operating quiescent current into AVIN MODE_CTRL[1:0] = 01, I
LED
= 0 mA 8.5 mA
MODE_CTRL[1:0] = 00, OV[1:0] ≠ 11
0.3 3.0 µ A
– 40 ° C ≤ T
J
≤ 85 ° C
I
SD
Shutdown current into AVIN
MODE_CTRL[1:0] = 00, OV[1:0] = 11
140 µ A
– 40 ° C ≤ T
J
≤ 85 ° C
V
UVLO
Undervoltage lockout threshold V
IN
falling 2.3 2.4 V
OUTPUT
Current regulator mode V
IN
5.5
V
OUT
Output voltage range V
Voltage regulator mode 4.5 5.25
OVP Output overvoltage protection V
OUT
rising 5.7 6.0 6.25 V
OVP
Output overvoltage protection hysterisis 0.15 V
D Minimum duty cycle 7.5%
0.25 V ≤ V
LED
≤ 2.0 V,
–15% 15%
50 mA ≤ I
LED
≤ 250 mA, T
J
= 50 ° C
LED current accuracy
(1)
0.25 V ≤ V
LED
≤ 2.0 V,
–12% 12%
200 mA ≤ I
LED
≤ 1200 mA, T
J
= 50 ° C
LED current temperature coefficient 0.08 %/ ° C
DC output voltage accuracy 2.5 V ≤ V
IN
≤ 0.9 V
OUT
, PWM operation –3% 3%
V
LED
LED sense voltage I
LED
= 1200 mA 250 mV
LED input leakage current V
LED
= V
OUT
= 5 V, –40 ° C ≤ T
J
≤ 85 ° C 0.1 1 µ A
POWER SWITCH
Switch MOSFET on-resistance 80
r
DS(on)
V
OUT
= V
GS
= 3.6 V m Ω
Rectifier MOSFET on-resistance 80
Switch MOSFET leakage 0.1 1
I
lkg(SW)
V
DS
= 6.0 V, –40 ° C ≤ T
J
≤ 85 ° C µ A
Rectifier MOSFET leakage 0.1 1
2.5 V ≤ V
IN
≤ 6.0 V, ILIM bits = 00 850 1000 1150
1275 1500 1725
I
lim
Switch current limit 2.5 V ≤ V
IN
≤ 6.0 V, ILIM bits = 01, 10
(1)
mA
1700 2000 2300
2.5 V ≤ V
IN
≤ 6.0 V, ILIM bits = 11
(1)
140 160 ° C
Thermal shutdown
(1)
20 ° C
Thermal shutdown hysteresis
(1)
OSCILLATOR
f
SW
Oscillator frequency 1.8 2.0 2.2 MHz
ADC
Resolution 3 Bits
V
LED
= 0.25 V, assured monotonic by design ± 0.25 ± 1 LSB
Total error
(1)
SDA, SCL, GPIO, ENVM, FLASH_SYNC
V
(IH)
High-level input voltage 1.2 V
V
(IL)
Low-level input voltage 0.4 V
Low-level output voltage (SDA) I
OL
= 8 mA 0.3
V
(OL)
V
Low-level output voltage (GPIO) DIR = 1, I
OL
= 8 mA 0.3
I
(LKG)
Logic input leakage current Input connected to V
IN
or GND, –40 ° C ≤ T
J
≤ 85 ° C 0.01 0.1 µ A
GPIO pull-down resistance DIR = 0, GPIO ≤ 0.4 V (TPS61050) 400 k Ω
ENVM pull-down resitance ENVM ≤ 0.4 V (TPS61052) 400 k Ω
FLASH_SYNC pull-down resistance FLASH_SYNC ≤ 0.4 V 400 k Ω
(1) Assured by design. Not tested in production.
3
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