Datasheet

SW
8
PGND7
GND6
CTRL
5
L
1
VIN 2
DO 3
FB
4
Exposed
Thermal
Pad
FB
PGND
SW
VIN
CTRL
+
-
Current Limit
+
-
ErrorComparator
S
R
CTRL
L
DO GND
Q1
Input switch
400 ns Min
Off Time
Undervoltage
Lockout
Bias Supply
Gate
Driver
Gate
Driver
RS Latch
Logic
6 ms Max
On Time
V
ref
= 1.233 V
Digital
Interface
6 Bit DAC
Soft
Start
Q2
Main Switch
R
sense
TPS61045
SLVS440B –JANUARY 2003–REVISED MARCH 2009 www.ti.com
DRB PACKAGE
(TOP VIEW)
The Exposed Thermal Pad is connected to PGND. Connect this pad directly with the GND pin.
PIN FUNCTIONS
PIN
I/O DESCRIPTION
NAME NO.
Combined enable and digital output voltage programming pin. Pulling CTRL constantly high enables
the device. When CTRL is pulled to GND, the device is disabled and the input is disconnected from
CTRL 5 I
the output by opening the integrated switch Q1. Pulsing CTRL low increases or decreases the output
voltage. Refer to the application information section for further information.
Internal DAC output. DO programs the output voltage via the CTRL pin. Refer to the application
DO 3 O
information section for further information.
FB 4 I Feedback. FB must be connected to the output voltage-feedback divider.
Analog ground. GND must be directly connected to the PGND pin. Refer to the application
GND 6
information section for further information.
L 1 O Drain of the internal input switch (Q1). Connect L to the inductor.
PGND 7 Power ground
Drain of the integrated main switch Q2. SW is connected to the inductor and anode of the Schottky
SW 8 I
rectifier diode.
VIN 2 I Input supply pin
FUNCTIONAL BLOCK DIAGRAM
4 Submit Documentation Feedback Copyright © 2003–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS61045