Datasheet

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C
C1

C
OUT
 ESR
COUT
R
C
(7)
Layout Considerations
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO
R2
R3
C4
OUTPUT
U1
R4
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
For a selected output capacitor of 22 µF with an ESR of 0.2 Ω , an R
C
of 33 k Ω , the value of C
C1
is in the range
of 100 pF.
Table 2. Recommended Compensation Components
OUTPUT CAPACITOR
INDUCTOR[µH] RC[k Ω ] CC1[pF] CC2[nF]
CAPACITANCE[µF] ESR[ Ω ]
33 22 0.2 33 120 33
22 22 0.3 47 150 22
10 22 0.4 100 100 10
10 10 0.1 100 10 10
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems.
Therefore, use wide and short traces for the main current path as indicated in bold in Figure 24 . The input
capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common
ground node as shown in Figure 24 to minimize the effects of ground noise. The compensation circuit and the
feedback divider should be placed as close as possible to the IC. To layout the control ground, it is
recommended to use short traces as well, separated from the power ground traces. Connect both grounds close
to the ground pin of the IC as indicated in the layout diagram in Figure 24 . This avoids ground shift problems,
which can occur due to superimposition of power ground current and control ground current.
Figure 24. Layout Diagram
18