Datasheet

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capacitor selection
C
min

I
OUT


V
OUT
 V
BAT

ƒ  V  V
OUT
(5)
V
ESR
 I
OUT
 R
ESR
(6)
Compensation of the Control Loop
R
C
100 kΩ
C
C1
10 pF
C
C2
10 nF
COMP
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
Table 1. Recommended Inductors (continued)
VENDOR RECOMMENDED INDUCTOR SERIES
Murata Murata LQS66C
Murata LQN6C
TDK TDK SLF 7045
TDK SLF 7032
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using Equation 5 .
Parameter f is the switching frequency and ∆ V is the maximum allowed ripple.
With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 6 .
An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 m Ω . The total
ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In
this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using
smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For
example, a 10 µF ceramic capacitor with an ESR of 50 m Ω is used on the evaluation module (EVM). Tradeoffs
must be made between performance and costs of the converter circuit.
A 10µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a
tantalum capacitor with a 100 nF ceramic capacitor in parallel placed close to the IC is recommended.
An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter.
Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output
capacitor must be compensated. The network shown in Figure 5 satisfies these requirements.
Figure 23. Compensation of Control Loop
Resistor R
C
and capacitor C
C2
depend on the chosen inductance. For a 10 µH inductor, the capacitance of C
C2
should be chosen to 10 nF, or in other words, if the inductor is XXµH, the chosen compensation capacitor should
be XX nF, the same number value. The value of the compensation resistor is then chosen based on the
requirement to have a time constant of 1 ms, for the R/C network R
C
and C
C2
, hence for a 33 nF capacitor, a 33
k Ω resistor should be chosen for R
C
.
Capacitor C
C1
depends on the ESR and capacitance value of the output capacitor, and on the value chosen for
R
C
. Its value is calculated using Equation 7 .
17