Datasheet

 
 
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
18
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APPLICATION INFORMATION
layout and board space
All capacitors should be soldered as close as possible to the IC. A PCB layout proposal for a two-layer board
is shown in Figure 31. Care has been taken to connect all capacitors as close as possible to the circuit to achieve
optimized output voltage ripple performance.
C2F
C1F
Figure 31. Recommended PCB Layout for TPS6050x (top layer)
Figure 32. Recommended PCB Layout for TPS6050x (bottom layer)