Datasheet
SLVS296 − JUNE 2000
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
typical operating circuit TPS60211
OUTPUT
3.3 V, 100 mA
INPUT
1.8 V to 3.6 V
ON/OFF
C1
1
µ
F
C2
1
µ
F
C
o
2.2
µ
F
C
i
2.2
µ
F
3
4
5
6
7
8
9
10
R1
Power-Good Signal
IN
C1−
C1+
TPS60211
OUT
C2−
C2+
PG
GND
1,2
SNOOZE
Figure 23. Typical Operating Circuit TPS60211 With Power-Good Comparator
power dissipation
The power dissipated in the TPS6021x devices depends mainly on input voltage (V
I
) and output current (I
O
)
and is approximated by:
P
(DISS)
+ I
O
x
ǒ
2xV
I
* V
O
Ǔ
for I
(Q)
tt I
O
(5)
By observing equation 5, it can be seen that the power dissipation is worse with a higher input voltage and a
higher output current. For an input voltage of 3.6 V and an output current of 100 mA, the calculated power
dissipation (P
(DISS)
) is 390 mW. This is also the point where the charge pump operates with its lowest efficiency.
With the recommended maximum junction temperature of 125°C and an assumed maximum ambient operating
temperature of 85°C, the maximum allowed thermal resistance junction to ambient of the system can be
calculated.
R
QJA(max)
+
T
J(MAX)
* T
A
P
DISS(max)
+
125°C * 85°C
390 mW
+ 102°CńW
(6)
P
DISS
must be less than that allowed by the package rating. The thermal resistance junction to ambient of the
used 10-pin MSOP is 294°C/W for an unsoldered package. The thermal resistance junction to ambient with the
IC soldered to a printed circuit using a board layout as described in the application information section, the R
ΘJA
is typically 200°C/W, which is higher than the maximum value calculated previously. However, in a battery
powered application, both the V
I
and the ambient temperature (T
A
) will typically be lower than the worst case
ratings used in equation 6, and P
DISS
should not be a problem in most applications.
layout and board space
Careful board layout is necessary due to the high transient currents and switching frequency of the converter.
All capacitors should be placed in close proximity to the device. A PCB layout proposal for a one-layer board
is given in Figure 24.
An evaluation module for the TPS60210 is available and can be ordered under product code
TPS60210EVM−167. The EVM uses the layout shown in Figure 26. The EVM has the form factor of a 14-pin
dual in-line package and can be mounted accordingly on a socket. All components, including the pins, are
shown in Figure 24. The actual size of the EVM is 17,9 mm x 10,2 mm = 182,6 mm
2
.