Datasheet


   
   
SLVS216B − JUNE 1999 − JUNE 2008
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
layout
All capacitors should be soldered in close proximity to the IC. A PCB layout proposal for a two-layer board is
given in Figure 29. Care has been taken to connect both single-ended charge pumps symmetrically to the load
to achive optimized output voltage ripple performance. The proposed layout also provides improved thermal
performance as the exposed leadframe is soldered to the PCB. The bottom layer of the PCB is a ground plain
only. All ground areas on the PCB should be connected. Connect ground areas on top layer to the bottom layer
via through hole connections.
GND
GND
GND
ENABLE
SYNC
C1+
C1−
GND
GND
OUT
IN
CLK
COM
SKIP
C2+
C2−
Figure 29. Recommended PCB Layout for TPS60111 (top view)
The evaluation module designed for the TPS60110 can, with slight modifications, be used for evaluation of the
TPS60111. The EVM can be ordered under literature code SLVP132 or under product code
TPS60110EVM−132.