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IMVP7 TPS59640 + TPS51219 + TPS51916 POWER EVM with

CSD87350Q5D Powerblocks

CPU Core

GPU CORE

TPS51219

VCCIO

TPS59640

Sandy Bridge

CPU socket (not

populated)

OCL, FSW,

OSR selection

TPS51916

DDR3L/DDR4

Memory Rail

Intel SVID GUI

from USB

CPU/GPU

VR_ON

Connections

for electronic

loads

CSD87350Q5D

Electrical Performance Specifications

www.ti.com

Figure 2. TPS59640EVM-751 EVM Illustration

3 Electrical Performance Specifications

Table 1. TPS59640EVM-751 Electrical Performance Specifications

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INPUT CHARACTERISTICS

12VBAT input voltage range VBAT 9 12 20 V

Maximum input current VBAT = 12 V, all full load (3-Phase CPU/1-Phase GPU) 16.2 A

No-load input current VBAT=12 V, all no load(3-Phase CPU/1-Phase GPU) 0.1 A

5VIN input voltage range Vin = 5 V 4.5 5 5.5 V

Maximum input current VBAT =12 V, all full load 0.3 A

No-load input current VBAT=12 V, all no load 0.1 A

OUTPUT CHARACTERISTICS

CPU (TPS59640)

Output voltage Vcore SVID: address:00 CPU, payload: 1.05 V 1.05 V

Line regulation 0.1%

Output voltage regulation

Load regulation(droop) load line –1.9 mΩ

Output voltage ripple VBAT=12 V, 1.05 V/90 A (3-Phase) at 300 kHz 25 mVpp

Output load current CPU 3-Phase operation 0 94 A

Output over current Selectable per phase 37 A

Switching frequency Selectable 250 300 600 kHz

Full load efficiency VBAT=12 V, 1.05 V/94 A at 300 kHz 80.05%

Using the TPS59640EVM-751 IMVP-7, 3-Phase CPU/1-Phase GPU SVID SLUU796– January 2012

Power System

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