Datasheet

9-20VBAT
CPU Core
(94A)
GPU Core
(33A)
Power Block
IMVP7
TPS59640
48 Pin
6x6 QFN
TPS51219
16 Pin
3x3 QFN
VCCIO: 1.05V/15A
TPS70102PWP
20 Pin
PWP
TPS51916
20 Pin
3x3 QFN
TMS320F2806PZS
TUSB3410RHB
VCCIO: 0A-10A
VDDQ: 1.2V/15A
VTT: 0.6V/2A,
VTTREF: 0.6V/10mA
1.8V/500mA
GPU: 0A-19A
On Board Dynamic
Load for CPU, GPU
and VCCIO
CPU: 0A-32A
SVID
5Vin
3.3V/250mA
Host Computer
B
USB Cable
A
GUI communication
DDR3L/DDR4 Memory Rail
www.ti.com TPS59640EVM-751 Power System Block Diagram
2 TPS59640EVM-751 Power System Block Diagram
Figure 1. TPS59640EVM-751 Power System Block Diagram
5
SLUU796– January 2012 Using the TPS59640EVM-751 IMVP-7, 3-Phase CPU/1-Phase GPU SVID
Power System
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