Datasheet

Test Condition: 12Vin, 1.05V/0A-32A
CPU 1-Phase on board dynamic load
CH1: DYN_C
CH2: CSW1
CH4: Vcore
TPS59640EVM
CPU Output Load Insertion with
OSR/USR = 20 k - Min
CH2: CSW1
CH3: Vcore
CH4: CPGOOD
TPS59640EVM
Dynamic VID: Set VID-Fast/Set VID-Decay
Test Condition: 12Vin,VID: 1.05V, 0.5A
CPU 1 Phase operation
0.6V-
CH1: VDIO
TPS59640EVM
CPU Output Load Release with
OSR/USR = 20 k - Min
Test Condition: 12Vin, 1.05V/0A-32A
CPU 2-Phase on board dynamic load
CH1: DYN_C
CH2: CSW1
CH4: Vcore
Performance Data and Typical Characteristic Curves www.ti.com
Figure 54. CPU1 Dynamic VID: SetVID-Decay/Fast Figure 55. CPU1 Output Load Insertion With OSR/USR
20k (Min)
Figure 56. CPU1 Output Load Release With OSR/USR 20k (Min)
42
Using the TPS59640EVM-751 IMVP-7, 3-Phase CPU/1-Phase GPU SVID SLUU796–January 2012
Power System
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated