Datasheet

EN1
Vout2
SS2
Vout1
SS/TR1
TPS57112-Q1
EN1
PWRGD1
SS/TR2
TPS57112-Q1
EN2
PWRGD2
VOUT1
VOUT 2
R1
R2
1.0533
247530
RT (k ) =
Fsw(kHz)
W
0.9492
131904
Fsw(kHz)
RT(k )
=
W
TPS57112-Q1
SLVSAL8 –DECEMBER 2010 www.ti.com
Figure 27. Ratio-metric and Simultaneous Startup Figure 28. Ratio-metric Start-Up using Coupled
Sequence SS/TR Pins
CONSTANT SWITCHING FREQUENCY and TIMING RESISTOR (RT/CLK Pin)
The switching frequency of the TPS57112-Q1 is adjustable over a wide range from 300 kHz to 2000 kHz by
placing a maximum of 700 kΩ and minimum of 85 kΩ, respectively, on the RT/CLK pin. An internal amplifier
holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. The
RT/CLK is typically 0.5 V. To determine the timing resistance for a given switching frequency, use the curve in
Figure 5 or Equation 9.
(9)
vertical spacer
(10)
To reduce the solution size one would typically set the switching frequency as high as possible, but tradeoffs of
the efficiency, maximum input voltage and minimum controllable on time should be considered.
The minimum controllable on time is typically 65 ns at full current load and 120 ns at no load, and limits the
maximum operating input voltage or output voltage.
OVERCURRENT PROTECTION
The TPS57112-Q1 implements a cycle by cycle current limit. During each switching cycle the high side switch
current is compared to the voltage on the COMP pin. When the instantaneous switch current intersects the
COMP voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low,
the error amplifier responds by driving the COMP pin high, increasing the switch current. The error amplifier
output is clamped internally. This clamp functions as a switch current limit.
FREQUENCY SHIFT
To operate at high switching frequencies and provide protection during overcurrent conditions, the TPS57112-Q1
implements a frequency shift. If frequency shift was not implemented, during an overcurrent condition the low
side MOSFET may not be turned off long enough to reduce the current in the inductor, causing a current
runaway. With frequency shift, during an overcurrent condition the switching frequency is reduced from 100%,
then 50%, then 25%, as the voltage decreases from 0.800 to 0 volts on VSENSE pin to allow the low side
MOSFET to be off long enough to decrease the current in the inductor. During start-up, the switching frequency
increases as the voltage on VSENSE increases from 0 to 0.800 volts. See Figure 6 for details.
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