Datasheet

Tss(mS) Iss( A)

Css(nF) =

Vref(V)

´ m

PWRGD

TPS57112-Q1

EN1

EN2

VO1

VO2

TPS57112-Q1

SLVSAL8 –DECEMBER 2010

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SLOW START / TRACKING PIN

The TPS57112-Q1 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the

SS/TR pin to ground implements a slow start time. The TPS57112-Q1 has an internal pull-up current source of 2

mA which charges the external slow start capacitor. Equation 4 calculates the required slow start capacitor value

where Tss is the desired slow start time in ms, Iss is the internal slow start charging current of 2 mA, and Vref is

the internal voltage reference of 0.800 V.

vertical spacer

(4)

If during normal operation, the VIN goes below the UVLO, EN pin pulled below 1.2 V, or a thermal shutdown

event occurs, the TPS57112-Q1 stops switching. When the VIN goes above UVLO, EN is released or pulled

high, or a thermal shutdown is exited, then SS/TR is discharged to below 60 mV before reinitiating a powering up

sequence. The VSENSE voltage will follow the SS/TR pin voltage with a 54mV offset up to 85% of the internal

voltage reference. When the SS/TR voltage is greater than 85% on the internal reference voltage the offset

increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference.

SEQUENCING

Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD

pins. The sequential method can be implemented using an open drain or collector output of a power on reset pin

of another device. Figure 23 shows the sequential method. The power good is coupled to the EN pin on the

TPS57112-Q1 which enables the second power supply once the primary supply reaches regulation.

Ratio-metric start up can be accomplished by connecting the SS/TR pins together. The regulator outputs ramp

up and reach regulation at the same time. When calculating the slow start time the pull up current source must

be doubled in Equation 4. The ratio metric method is illustrated in Figure 25.

Figure 23. Sequential Start-Up Sequence Figure 24. Sequential Startup using EN and

PWRGD

Product Folder Link(s): TPS57112-Q1