Datasheet
V = 1 V / div
OUT
Time = 2 msec / div
EN = 2 V / div
V = 10 V / div
IN
SS = 2 V / div
V = 1 V / div
OUT
Time = 2 msec / div
EN = 2 V / div
V = 10 V / div
IN
SS = 2 V / div
Test Setup and Results
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2.9 Powering Up
Figure 10 and Figure 11 show the start-up waveforms for the TPS56921EVM-188. In Figure 10, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1 and R2
resistor divider network. In Figure 11, the input voltage is initially applied and the output is inhibited by
using a jumper at JP2 to tie EN to GND. When the jumper is removed, EN is released. When the EN
voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps
up to the externally set value of 1.1 V. The input voltage for these plots is 12 V and the load is 1 Ω.
Figure 12 shows a detailed view of the output voltage ramp up.
Figure 10. TPS56921EVM-188 Start-Up Relative to V
IN
Figure 11. TPS56921EVM-188 Start-Up Relative to Enable
10
TPS56921EVM-188, 9-A, SWIFT™ Regulator Evaluation Module SLVU793–October 2012
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