Datasheet
TPS5602
DUAL, FAST, HIGH EFFICIENCY CONTROLLER FOR DSP POWER
SLVS217 – JUNE 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed description (continued)
hysteretic comparator
Each channel has a hysteretic comparator to regulate the output voltage of the synchronous-buck converter.
The hysteresis is set internally and is typically 8.5 mV. The total delay from the comparator input to the driver
output is typically 500 ns from low to high and 350 ns from high to low.
low-side driver
The low-side driver is designed to driver low-Rds(on) n-channel MOSFETs. The maximum drive voltage is 5 V
from Vref5. The current rating of the driver is typically 1 A, source and sink.
high-side driver
The high side driver is designed to drive low-Rds(on) n-channel MOSFETs. The current rating of the driver is
1 A, source and sink. When configured as a floating driver, the bias voltage to the driver is developed from the
Vref5, limiting the maximum drive voltage between OUTxU and LLx to 5 V. The maximum voltage that can be
applied between LHx and OUTGNDx is 30 V.
deadtime control
Deadtime control prevents shoot-through current from flowing through the main power FETs during switching
transitions by actively controlling the turnon time of the MOSFETs drivers. The typical deadtime from
low-side-driver-off to high-side-driver-on is 75 ns and 164 ns from high-side-driver-off to low-side-driver-on.
current protection
The current protection is achieved by sensing the high-side power MOSFET drain-to-source voltage drop during
on-time through V
CC
Sense and LLx pins. An external resistor between Vin and TRIPx pin with the internal
current source connected to the current comparator negative input adjusts the current limit. The typical internal
current source current is 15 µA. When the voltage on the positive pin is lower than the negative pin, the current
comparator turns on the trigger, and then activates the oscillator. This oscillator repeatedly resets the trigger
until the overcurrent condition is removed. The equation for the external resistor selection is:
Rclmt
Rds(on) (Itrip Iind(p-p) 2)
0.000015
Where Rds(on) is the MOSFET turnon resistance; Itrip is the required trip current; Iind(p-p) is the peak-to-peak
inductor ripple current. Itrip must be greater than 0.5×Iind(p-p). The tolerance is ±30%.
COMP
COMP is an internal comparator used for any voltage protection such as the output under-voltage protection
for DSP power applications. If the core voltage is lower than the setpoint, the comparator turns off both channels
to prevent the DSP from damage.
SOFT1, SOFT2
Separate soft-start terminals make it possible to set the sequencing of each output for any possibility. The
capacitor value for a start-up time can be calculated by the following equation:
C = 2 × T (µF)
Where C is the external capacitor value, T is the required start-up time in (ms).
STBY1, STBY2
Both channels can be switched into standby mode separately by grounding the STBY pin. The standby current
is less than 1 µA. The STBY pins can be used for sequencing.
UVLO
When the input voltage rises to about 3.8 V, the IC is turned on, ready to function. When the input voltage falls
below the turnon value, the IC is turned off. The typical hysteresis is 149 mV.