Datasheet

RT/CLK
TPS55010
Clock
Source
PLL
RT
RT/CLK
TPS55010
Hi-Z
Clock
Source
PLL
RT
TPS55010
SLVSAV0A –APRIL 2011–REVISED JUNE 2011 www.ti.com
Figure 21. Synchronizing to a System Clock
Overcurrent Protection
The TPS55010 implements a cycle by cycle current limit. During each switching cycle the high side switch
current is compared to the voltage on the COMP pin. When the instantaneous switch current intersects the
COMP voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low,
the error amplifier responds by driving the COMP pin high, increasing the switch current. The error amplifier
output is clamped internally. This clamp functions as a switch current limit.
Reverse Overcurrent Protection
The TPS55010 implements low side current protection by detecting the voltage across the low side MOSFET.
When the converter sinks current through its low side FET, the control circuit turns off the low side MOSFET if
the reverse current is more than 4.5 A
FAULT Pin
The Fault pin output is an open drain MOSFET. The output is pulled low when the VSENSE voltage is below
91% or rising above 108% of the nominal internal reference voltage. It is recommended to use a pull-up resistor
between the values of 1kΩ and 100kΩ to a voltage source that is 6 V or less. The Fault pin is in a valid state
once the VIN input voltage is greater than 1.6 V. The FAULT pin is pulled low, if the input UVLO or thermal
shutdown is asserted, or the EN pin is pulled low.
Thermal Shutdown
The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 171°C.
The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal
trip threshold. Once the die temperature decreases below 159°C, the device reinitiates the power up sequence
by discharging the SS pin to below 40 mV. The thermal shutdown hysteresis is 12 ° C.
OPERATION OF THE Fly-Buck™ CONVERTER
Figure 22 shows a simplified schematic and the two primary operational states of the Fly-Buck converter. The
power supply is a variation of a Flyback converter and consists of a half bridge power stage S
HS
and S
LS
,
transformer, primary side capacitor, diode and output capacitor. The output voltage is regulated indirectly by
using the primary side capacitor voltage, V
PRI
, as feedback. The Fly-Buck is a portmanteau of flyback and buck
since the transformer is connected as a flyback converter and the input to output voltage relationship is similar to
a buck derived converter, assuming the converter is operating in steady state and the transformer has negligible
leakage inductance.
The C
PRI
and L
PRI
are charged by the input voltage source VIN during the time the high side switch S
HS
is on.
During this time, diode D1 is reversed biased and the load current is supplied by output capacitor C
O
.
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