Datasheet

1.0793
T
sw
156000
R (k )
(kHz)
W =
f
SS SS
SS
REF
T (ms) × I (uA)
C (nF) =
V (V)
( )
UVLO1 ENfalling
UVLO2
STOP ENfalling UVLO1 HYS
R × V
R =
V - V + R × I1 + I
TPS55010
www.ti.com SLVSAV0A –APRIL 2011–REVISED JUNE 2011
(4)
Adjusting Slow Start Time
A capacitor on the SS pin to ground implements a slow start time to minimize inrush current during startup. The
TPS55010 regulates to the lower of the SS pin and the internal reference voltage. The TPS55010 has an internal
pull-up current source of 2.2 µA which charges the external slow start capacitor. Equation 5 calculates the
required slow start capacitor value where T
SS
is the desired slow start time in ms, Iss is the internal slow start
charging current of 2.2 µA, and V
REF
is the internal voltage reference of 0.829 V.
If during normal operation, the VIN goes below the UVLO, EN pin pulled below 1.18 V, or a thermal shutdown
event occurs, the TPS55010 stops switching. When the VIN goes above UVLO, EN is released or pulled high, or
a thermal shutdown is exited, then SS is discharged to below 40 mV before reinitiating a powering up sequence.
The VSENSE voltage will follow the SS pin voltage with a 35 mV offset up to 85% of the internal voltage
reference. When the SS voltage is greater than 85% on the internal reference voltage the offset increases as the
effective system reference transitions from the SS voltage to the internal voltage reference. If no slow start time
is needed, the SS pin can be left open. The slow start capacitor should be less than 0.47 µ F.
(5)
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
The switching frequency of the TPS55010 is adjustable over a wide range from 100 kHz to 2000 kHz by placing
a maximum of 1070 kΩ and minimum of 42.2 kΩ, respectively, on the RT/CLK pin. An internal amplifier holds this
pin at a fixed voltage when using an external resistor to ground to set the switching frequency. The RT/CLK is
typically 0.5 V. To determine the timing resistance for a given switching frequency, use Equation 6.
To reduce the solution size one would typically set the switching frequency as high as possible, but tradeoffs of
the efficiency, maximum input voltage and minimum controllable on time should be considered. The minimum
controllable on time is typically 130 ns.
(6)
How to Interface to RT/CLK Pin
The RT/CLK pin can be used to synchronize the regulator to an external system clock. To implement the
synchronization feature connect a square wave to the RT/CLK pin through one of the circuit networks shown in
Figure 21. The square wave amplitude must transition lower than 0.4V and higher than 2.2V on the RT/CLK pin
and have a high time greater than 75 ns. The synchronization frequency range is 300 kHz to 2000 kHz. The
rising edge of the PH is synchronized to the falling edge of RT/CLK pin signal.
The external synchronization circuit should be designed in such a way that the device has the default frequency
set resistor connected from the RT/CLK pin to ground should the synchronization signal turn off. It is
recommended to use a frequency set resistor connected as shown in Figure 21 through another resistor (e.g 50
Ω) to ground for clock signal that are not Hi-Z or tri-state during the off state. The RT resistor value should set
the switching frequency close to the external CLK frequency. It is recommended to ac couple the synchronization
signal through a 10 pF ceramic capacitor to RT/CLK pin. The first time the CLK is pulled above the CLK
threshold the device switches from the RT resistor frequency to PLL mode. The internal 0.5 V voltage source is
removed and the CLK pin becomes high impedance as the PLL starts to lock onto the external signal. Since
there is a PLL on the regulator the switching frequency can be higher or lower than the frequency set with the
external resistor. The device transitions from the resistor mode to the PLL mode and then will increase or
decrease the switching frequency until the PLL locks onto the external CLK frequency within 50 microseconds.
When the device transitions from the PLL to resistor mode the switching frequency will slow down from the CLK
frequency to 150 kHz, then reapply the 0.5V voltage and the resistor will then set the switching frequency.
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