Datasheet

Power Sequencing Test
2-5
Test Setup and Results
rate of about 75 V/ms, there is less than 0.3-V difference between the core
voltage and I/O voltage. This difference and some delay are caused by the
response time of the feedback loop of tracking regulator. For most applications
the I/O voltage falls much slower and the difference between core and I/O
voltage becomes negligible. Notice that power down by removing the input
voltage may not provide proper power sequencing below undervoltage lockout
limit where the both integrated switches are off. So, using the ENABLE signal
for power down is the preferred option for power sequencing.
Figure 2-3. Powering Down With Tracking
The TPS54x80EVM-228 EVM provides the ability to change the slew rate of
output voltage of the core regulator by using jumper JP2 (see schematic in
Figure 4-1). If jumper JP2 is set so that R2 is connected in parallel to R6,
ratiometric power sequencing is implemented. For ratiometric sequencing, the
following condition needs to be met: R3 = R18 and R2 II R6 = R19. In this case
the I/O and core voltages reach their nominal values at the same time. The
waveforms for ratiometric powering up and down are shown in Figure 2-4 and
Figure 2-5.