Datasheet
SS/TR
EN
PWRGD
SS/TR
EN
PWRGD
TPS54620
TPS54620
PWRGD=2V/div
EN=2V/div
Vout1=1V/div
Vout2=1v/div
Time=20msec/div
EN=2V/div
Vout1=1V/div
Vout2=1v/div
Time=20msec/div
.
.
SS/TR
TPS54620
EN
PWRGD
SS/TR
EN
PWRGD
TPS54620
TPS54620
www.ti.com
SLVS949C –MAY 2009– REVISED MAY 2011
Figure 22. Sequential Start Up Sequence Figure 23. Sequential Start Up using EN and
PWRGD
Figure 24 shows the method implementing ratio-metric sequencing by connecting the SS/TR pins of two devices
together. The regulator outputs ramp up and reach regulation at the same time. When calculating the slow start
time the pull-up current source must be doubled in Equation 5. Figure 25 shows the results of Figure 24.
Figure 25. Ratio-metric Startup using Coupled
SS/TR Pins
Figure 24. Ratiometric Start Up Sequence
Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network
of R1 and R2 shown in Figure 26 to the output of the power supply that needs to be tracked or another voltage
reference source. Using Equation 6 and Equation 7, the tracking resistors can be calculated to initiate the Vout2
slightly before, after or at the same time as Vout1. Equation 8 is the voltage difference between Vout1 and
Vout2.
To design a ratio-metric start up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2
reaches regulation, use a negative number in Equation 6 and Equation 7 for deltaV. Equation 8 results in a
positive number for applications where the Vout2 is slightly lower than Vout1 when Vout2 regulation is achieved.
Figure 27 and Figure 28 show the results for positive deltaV and negative deltaV respectively.
The deltaV variable is zero volt for simultaneous sequencing. To minimize the effect of the inherent SS/TR to
VSENSE offset (Vssoffset, 29mV) in the slow start circuit and the offset created by the pull-up current source
(Iss, 2.3μA) and tracking resistors, the Vssoffset and Iss are included as variables in the equations. Figure 29
shows the result when deltaV = 0V.
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