Datasheet
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LAYOUT CONSIDERATIONS FOR THERMAL
ConnectPin1to AnalogGroundPlane
inThis AreaforOptimumPerformance
MinimumRecommendedTop
Side AnalogGround Area
0.3478
0.0150
0.06
0.0256
0.1700
0.1340
0.0630
0.0400
q 0.01804PL
0.2090
q 0.0130
8PL
MinimumRecommendedExposed
Copper AreaforPowerpad.5mm
StencilsMayRequire10Percent
Larger Area
0.0650
0.0500
0.0500
0.0650
0.0339
0.0339
0.0500
MinimumRecommendedThermalVias:8x0.013DiameterInside
Powerpad Area4x0.018DiameterUnderDeviceasShown.
Additional0.018DiameterViasMayBeUsedifTopSide AnalogGround
AreaIsExtended.
0.3820
TPS54610
SLVS398F – JUNE 2001 – REVISED APRIL 2007
plane layer must be made using 0.013 inch diameter
PERFORMANCE vias to avoid solder wicking through the vias. Eight
vias must be in the PowerPAD area with four
For operation at full rated load current, the analog
additional vias located under the device package.
ground plane must provide an adequate heat
The size of the vias under the package, but not in
dissipating area. A 3-inch by 3-inch plane of 1 ounce
the exposed thermal pad area, can be increased to
copper is recommended, though not mandatory,
0.018. Additional vias beyond the twelve
depending on ambient temperature and airflow. Most
recommended that enhance thermal performance
applications have larger areas of internal ground
must be included in areas not under the device
plane available, and the PowerPAD must be
package.
connected to the largest area available. Additional
areas on the top or bottom layers also help dissipate
heat, and any area available must be used when 6 A
or greater operation is desired. Connection from the
exposed area of the PowerPAD to the analog ground
Figure 12. Recommended Land Pattern for 28-Pin PWP PowerPAD
11
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