Datasheet

6
6.5
7
7.5
8
8.5
9
±50 ±25 0 25 50 75 100 125 150
High Side Switch Current (A)
T
J
- Junction Temperature (C)
C027
6
6.5
7
7.5
8
8.5
9
0 10 20 30 40 50 60
High Side Switch Current (A)
V
I
- Input Voltage (V)
Series1
Series2
Series4
C028
±40 C
25 C
150 C
0
0.05
0.1
0.15
0.2
0.25
±50 ±25 0 25 50 75 100 125 150
R
DSON
- On-State Resistance ()
T
J
- Junction Temperature (C)
BOOT-SW = 3 V
BOOT-SW = 6 V
C025
0.784
0.789
0.794
0.799
0.804
0.809
0.814
±50 ±25 0 25 50 75 100 125 150
V
FB
- Voltage Referance ( V)
T
J
- Junction Temperature (C)
C026
TPS54560
SLVSBN0A –MARCH 2013–REVISED MARCH 2014 www.ti.com
7.6 Timing Requirements
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ENABLE AND UVLO (EN TERMINAL)
Hysteresis current –2.2 –3.4 -4.5 μA
Enable to COMP active V
IN
= 12 V, T
A
= 25°C 540 µs
INTERNAL SOFT-START TIME
Soft-Start Time f
SW
= 500 kHz, 10% to 90% 2.1 ms
Soft-Start Time f
SW
= 2.5 MHz, 10% to 90% 0.42 ms
CURRENT LIMIT
Current limit threshold delay 60 ns
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK TERMINAL)
Minimum CLK input pulse width 15 ns
RT/CLK falling edge to SW rising edge
Measured at 500 kHz with RT resistor in series 55 ns
delay
PLL lock in time Measured at 500 kHz 78 μs
7.7 Typical Characteristics
V
IN
= 12 V V
IN
= 12 V
Figure 1. On Resistance vs Junction Temperature Figure 2. Voltage Reference vs Junction Temperature
V
IN
= 12 V
Figure 3. Switch Current Limit vs Junction Temperature Figure 4. Switch Current Limit vs Input Voltage
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