Datasheet

POWER PAD
SW1
VBST
SS
VO
VFB
GND
PGND1
14
7
5
6
2
3
4
1
VIN2
EN
PG
VREG5
13
12
11
9
8
PGND2
10
SW2
VIN1
VBST
VO
SW3
SW1
SW2
VIN3 VIN1 VIN2
VFB
VREG5
GND
SS
PG
EN
PGND2
PGND1
POWER PAD
16
7
5
6
2
3
4
1
15
12
11
9
8
10
14
13
TPS54526
www.ti.com SLVSB84B –MAY 2012–REVISED JANUARY 2014
DEVICE INFORMATION
RSA PACKAGE
(TOP VIEW)
PWP PACKAGE
(TOP VIEW)
PIN FUNCTIONS
PIN
DESCRIPTION
NAME NUMBER
PWP 14 RSA 16
VO 1 16 Connect to output of converter. This pin is used for output discharge function.
VFB 2 1 Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND. VREG5 is not
VREG5 3 2
active when EN is low.
SS 4 3 Soft-start control. An external capacitor should be connected to GND.
GND 5 4 Signal ground pin.
PG 6 5 Open drain power good output.
EN 7 6 Enable control input. EN is active high and must be pulled up to enable the device.
PGND1, Ground returns for low-side MOSFET. Also serve as inputs of current comparators. Connect
8, 9 7, 8
PGND2 PGND and GND strongly together near the IC.
SW1, SW2, Switch node connection between high-side NFET and low-side NFET. Also serve as inputs to
10, 11 9, 10, 11
SW3
(1)
current comparators.
Supply input for high-side NFET gate driver (boost terminal). Connect capacitor from this pin to
VBST 12 12
respective SW1, SW2 terminals. An internal PN diode is connected between VREG5 to VBST pin.
VIN1, VIN2, Power input and connected to high side NFET drain. Supply input for 5-V internal linear regulator
13, 14 13, 14, 15
VIN3
(1)
for the control circuitry.
Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be
PowerPAD™ Back side Back side
connected to PGND.
(1) SW3, VIN3 applies to 16 pin package only.
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