Datasheet

VOUT
VFB
VREG5
SS
GND
PG
EN
VIN2
VIN1
VBST
SW2
SW1
PGND1
PGND2
EXPOSED
POWERPAD
AREA
BOOST
CAPACITOR
VOUT
VIA toGroundPlane
OUTPUT
INDUCTOR
OUTPUT
FILTER
CAPACITOR
SLOW
START
CAP
ANALOG
GROUND
TRACE
VIN
INPUT
BYPASS
CAPACITOR
VIN
FEEDBACK
RESISTORS
EtchonBottomLayer
orUnderComponent
ToEnable
Control
POWERGROUND
BIAS
CAP
Additional
Thermal
Vias
Additional
Thermal
Vias
Connectionto
POWERGROUND
oninternalor
bottomlayer
VINOVER
CURRENT
STABILITY
CAPACITOR
TPS54526
www.ti.com SLVSB84B –MAY 2012–REVISED JANUARY 2014
Figure 18. PCB Layout for PWP Package
Copyright © 2012–2014, Texas Instruments Incorporated 17
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