Datasheet

POWER PAD
TPS54525
PWP
HTSSOP14
SW1
VBST
SS
VO
VFB
GND
PGND1
14
7
5
6
2
3
4
1
VIN2
EN
PG
VREG5
13
12
11
9
8
PGND2
10
SW2
VIN1
PWP PACKAGE
(TOP VIEW)
TPS54525
www.ti.com
SLVSB82A MAY 2012REVISED JULY 2013
DEVICE INFORMATION
PIN FUNCTIONS
PIN
DESCRIPTION
NAME NO.
VO 1 Connect to output of converter. This pin is used for output discharge function.
VFB 2 Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND. VREG5 is not active
VREG5 3
when EN is low.
SS 4 Soft-start control. An external capacitor should be connected to GND.
GND 5 Signal ground pin
PG 6 Open drain power good output
EN 7 Enable control input. EN is active high and must be pulled up to enable the device.
Ground returns for low-side MOSFET. Also serve as inputs of current comparators. Connect PGND and
PGND1, PGND2 8, 9
GND strongly together near the IC.
Switch node connection between high-side NFET and low-side NFET. Also serve as inputs to current
SW1, SW2 10, 11
comparators.
Supply input for high-side NFET gate driver (boost terminal). Connect capacitor from this pin to
VBST 12
respective SW1, SW2 terminals. An internal PN diode is connected between VREG5 to VBST pin.
Power input and connected to high side NFET drain. Supply input for 5-V internal linear regulator for the
VIN1, VIN2 13, 14
control circuitry.
Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be connected
PowerPAD™ Back side
to PGND.
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