Datasheet

TPS54525
SLVSB82A –MAY 2012–REVISED JULY 2013 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
TRANSPORT
T
A
PACKAGE
(2) (3)
ORDERABLE PART NUMBER PIN
MEDIA, QUANTITY
TPS54525PWP Tube
PowerPAD™
–45°C to 85°C 14
(HTSSOP) – PWP
TPS54525PWPR Tape and Reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) All package options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
VIN1, VIN2 EN –0.3 20 V
VBST –0.3 26 V
VBST (10 ns transient) –0.3 28 V
Input voltage range, VBST (vs SW1, SW2) –0.3 6.5 V
VFB, VO, SS, PG –0.3 6.5 V
SW1, SW2 –2 20 V
SW1, SW2 (10 ns transient) –3 22 V
VREG5 –0.3 6.5 V
Output voltage range
PGND1, PGND2 –0.3 0.3 V
Voltage from GND to PowerPAD™, V
diff
–0.2 0.2 V
Human Body Model (HBM) 2 kV
Electrostatic discharge
Charged Device Model (CDM) 500 V
Operating junction temperature, T
J
–40 150 °C
Storage temperature, T
stg
–55 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS54525
THERMAL METRIC
(1)
PWP UNITS
14 PINS
θ
JA
Junction-to-ambient thermal resistance 43.7
θ
JCtop
Junction-to-case (top) thermal resistance 33.1
θ
JB
Junction-to-board thermal resistance 28.4
°C/W
ψ
JT
Junction-to-top characterization parameter 1.3
ψ
JB
Junction-to-board characterization parameter 28.2
θ
JCbot
Junction-to-case (bottom) thermal resistance 4.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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